Interleaved Read/Write Bus Transactions for Multi-Target Systems
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional methods for performing read/write operations on a computer bus are inefficient when targeting multiple devices, particularly in I2O compliant systems, due to longer latencies and the need for multiple bus transactions, which can lead to increased wait states and reduced system efficiency.
Innovation Solution
The system initiates interleaved data read/write operations as a single request to multiple target devices, which are grouped to recognize a shared base address and execute specific data operations simultaneously, reducing the number of requests needed and allowing multiple targets to access different memory portions concurrently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If conventional methods are used to perform read/write operations on multiple target devices, then each device can be accessed individually, but the number of bus transactions increases and latency is significantly longer
Solution Approach 1:
The patent combines multiple individual read/write operations to multiple target devices into a single bus transaction. The initiator device sends one request that is broadcast to multiple target devices, and each target device responds simultaneously with its portion of the data. This merging of operations eliminates the need for multiple sequential transactions, significantly reducing latency and improving system efficiency.
2Productivity
If multiple bus transactions are used to access multiple target devices, then each transaction can be completed sequentially, but wait states increase and throughput decreases
Solution Approach 1:
The patent enables continuous useful action by allowing multiple target devices to respond simultaneously to a single request. Instead of sequential transactions with idle wait states between them, the system maintains continuous bus activity where all target devices transmit their data portions concurrently, maximizing throughput and eliminating unnecessary wait states.
3Adaptability or versatility
If conventional I2O compliant communication protocol is used for multicasting, then device compatibility is maintained, but latencies are significantly longer
Solution Approach 1:
The patent segments the response phase from the request phase. A single broadcast request is sent to multiple target devices, and each target device independently responds with its assigned portion of the data. This segmentation allows the system to maintain I2O compatibility for the request format while enabling parallel response transmission, thereby reducing latency without sacrificing device compatibility.
4Reliability
If multiple sequential requests are sent to multiple target devices, then each device receives the correct data, but the number of bus transactions increases and system efficiency is reduced
Solution Approach 1:
The patent applies local quality by assigning specific portions of the data to specific target devices. Each target device is configured to respond only with the data portion assigned to it, ensuring data accuracy and reliability. This localized assignment allows multiple devices to operate simultaneously without interference, improving system efficiency while maintaining correct data transmission to each device.
Data Source
AI summary
Bus transactions in a computer network are improved by utilizing a multicast transaction from a single initiator to multiple targets. The multiple targets simultaneously execute the transaction and provide a return transaction to the initiator. The transaction cycle time is reduced as individual request to each target is replace with a single request to a collective target group, addressable by a single base memory address. Interleaved read or write operation is provided to allow the multiple targets of a particular target group to independently execute a portion of the transaction request. Improved bus performance is achieve by utilizing the higher throughput capacity of the system bus providing a higher number of shorter data segments from each target executing its portion of the larger transaction.