Interleaved Busbar Packages for DC Bulk Capacitors
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Solution Overview
Problem
High-voltage electric power systems in hybrid and electric vehicles face challenges with parasitic inductance and power losses due to conventional capacitor packaging, limiting the efficiency and size of traction inverters.
Innovation Solution
The use of interleaved busbar packages in high-frequency DC bulk capacitors with U-shaped geometries and an isolator sheet between busbar plates reduces parasitic inductance, enabling improved current sharing and increased switching frequency, which is then integrated with a power inverter module via laser welding for reduced power losses and modular scalability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional capacitor packaging is used, then manufacturing and assembly are simpler, but parasitic inductance increases and power losses occur
Solution Approach 1:
The patent transitions from conventional planar busbar arrangements to a three-dimensional interleaved configuration where positive and negative busbars are stacked alternately. This spatial arrangement in multiple dimensions minimizes the current loop area and reduces parasitic inductance, directly addressing the energy loss problem while maintaining manageable complexity through modular construction
Solution Approach 2:
The patent implements nesting by placing one busbar inside another in an interleaved configuration, where inner busbars are surrounded by outer busbars. This nested arrangement creates compact current loops with minimal inductance, effectively reducing power losses while organizing complex components in a space-efficient manner
2Productivity
If higher switching frequencies are used, then power density and efficiency improve, but parasitic inductance causes power losses
Solution Approach 1:
The three-dimensional interleaved busbar structure reduces the effective area of current loops by arranging conductors in multiple spatial layers. This dimensional optimization minimizes parasitic inductance, enabling the system to operate at higher switching frequencies without excessive power losses and improving overall productivity
Solution Approach 2:
The patent changes the geometric parameters of the busbar configuration, specifically the spacing and arrangement of conductors, to optimize the inductance characteristics. By adjusting these physical parameters, the system achieves lower parasitic inductance that supports higher switching frequencies while maintaining acceptable power loss levels
3Reliability
If current sharing between parallel capacitors is improved, then power distribution symmetry increases, but device complexity increases
Solution Approach 1:
The patent employs asymmetric busbar geometries with different path lengths and cross-sectional areas to compensate for inherent imbalances in parallel capacitor connections. By deliberately introducing asymmetric features in the busbar design, the system achieves symmetric current distribution and improved reliability, offsetting the increased structural complexity
Solution Approach 2:
The interleaved three-dimensional arrangement of busbars creates multiple parallel current paths with more uniform impedance characteristics. This spatial configuration in multiple dimensions promotes equal current sharing among parallel capacitors, enhancing reliability while the modular nature manages the complexity of the busbar network
4Weight of moving object
If busbar size is reduced, then capacitor size and weight decrease, but parasitic inductance increases
Solution Approach 1:
The nested interleaved configuration allows busbars to be arranged in compact concentric patterns, maximizing the use of available space. This nesting enables reduced overall capacitor dimensions and weight while maintaining short current paths that minimize parasitic inductance, achieving both weight reduction and low inductance
Solution Approach 2:
By transitioning to a three-dimensional interleaved busbar layout, the patent reduces the planar footprint and overall size of the capacitor assembly. The vertical stacking and alternating arrangement in multiple dimensions compress the structure, decreasing weight while the compact current loops maintain low parasitic inductance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration minimizes total power stage inductance by up to five times, allows for the use of wide bandgap devices at higher slew rates, and enhances the 'miles per gallon' efficiency of electric-drive vehicles by reducing size, weight, and cost while enabling high-frequency operations.
Implementation Method 1
The interleaved busbar package includes two electrically conductive busbar plates fabricated with complementary U-shaped geometries that enable one busbar to nest within the other busbar
Implementation Method 2
Terminal tabs at distal ends of the busbar conductors may be electrically connected, e.g., via laser welding, to a power inverter module (PIM)
Data Source
AI summary
Presented are electrical capacitors with interleaved busbar architectures, methods for making/operating such capacitors, and electric-drive vehicles equipped with such capacitors. A bulk capacitor includes multiple capacitor devices disposed within an outer housing and operable to modify electric current transmitted between a power source and an electrical load. An interleaved busbar package is interposed between the capacitor devices and outer housing. The interleaved busbar package includes a first busbar plate that electrically connects to first terminals of the capacitor devices and defines a busbar pocket. A second busbar plate is seated within the busbar pocket and electrically connects to second terminals of the capacitor devices. The second busbar plate includes a capacitor basin that seats therein the capacitor devices. An isolator sheet is interleaved between and electrically insulates the first and second busbar plates. The capacitor devices and interleaved busbar package may be partially submerged in an epoxy endfill composition.