Interleaved CIC Filter Structure for High Data Rate Timing
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Solution Overview
Problem
High-data-rate digital signal processing systems face challenges with integrated circuit implementations of cascaded comb-integrator (CIC) filters, including data timing problems and increased filter dissipation due to the need for pipelined adder structures, which raise fabrication costs and system heating.
Innovation Solution
The implementation of an interleaved comb and integrator filter system that serially couples an input filter section, a resampler, and an output filter section, with comb structures processing at a lower data rate and integrator structures processing at a higher data rate, allowing each path to operate at a reduced rate and reducing the need for pipelined adder structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If CIC filters operate at high data rates, then productivity is improved, but device complexity and loss of energy worsen due to pipelined adder structures
Solution Approach 1:
The filter is divided into multiple parallel processing paths (P paths), where each path processes a portion of the data rate. This segmentation allows the overall high data rate to be achieved through parallelism while each individual path operates at a lower, more manageable rate, reducing the complexity of pipelined adder structures in each path.
Solution Approach 2:
The patent transitions from a single sequential processing path to multiple parallel processing paths, effectively adding a dimensional aspect to the data flow. This multi-dimensional approach allows the system to achieve high overall throughput while keeping individual path complexities low, as each path handles only a fraction of the total data rate.
2Productivity
If CIC filters operate at high data rates, then productivity is improved, but loss of energy worsens due to increased filter dissipation
Solution Approach 1:
By segmenting the filter into P parallel paths, each operating at a reduced data rate, the energy consumption per path is significantly reduced. Since energy dissipation in digital circuits is closely related to operating rate and switching activity, this segmentation directly addresses the energy loss problem while maintaining high overall productivity through parallel processing.
3Productivity
If CIC filters use pipelined adder structures, then productivity is improved, but object-generated harmful factors worsen due to system heating
Solution Approach 1:
The segmentation into P parallel paths reduces the computational load and switching activity in each individual path, thereby reducing heat generation per path. While the overall system processes high data rates, the distributed architecture spreads the thermal load across multiple paths, preventing excessive localized heating that would occur in a single high-speed pipelined structure.
Data Source
AI summary
Filter system embodiments are provided for realizing interpolation and decimation processes with interleaved filter structures. These interleaved structures enable the systems to obtain output data rates that exceed the highest operation rates of the system components.