Time-Interleaved DAC Calibration for Optical Signal Distortion

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Solution Overview

Problem

The conventional TI (AMUX)-DAC architecture for ultra-wideband optical communication systems suffers from calibration imperfections, leading to distortions, mismatches, and a degradation in effective number of bits (ENOB) and spectral efficiency.

Innovation Solution

A signal processing apparatus is introduced, featuring a plurality of time-interleaving digital-to-analog converters (sub-DACs) with an analog multiplexer, a local analog-to-digital converter, a digital compensation engine, and a digital pre-processing stage. This apparatus employs an improved background calibration approach to align sub-DAC gains, correct timing mismatches, and compensate for non-linear distortions using feedback from a local ADC.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If multiple sub-DACs are connected in parallel with additional analog multiplexer to increase transmission bandwidth, then the transmission bandwidth is improved, but the device complexity and calibration imperfections increase

Engineering Contradiction:
Improvetransmission bandwidthVSAvoiddevice complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The system divides the high-speed conversion task into multiple parallel sub-DACs, each operating at a lower sample rate. This segmentation allows the overall system to achieve high transmission bandwidth while keeping individual converter complexity manageable. The analog multiplexer combines outputs from multiple sub-DACs to reconstruct the high-speed signal.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An analog multiplexer is introduced as an intermediary component to combine the outputs of multiple sub-DACs. This mediator enables the parallel sub-DAC architecture to function as a unified high-speed converter, resolving the complexity issue by providing a standardized interface for combining multiple lower-speed channels.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If multiple sub-DACs are connected in parallel to increase transmission bandwidth, then the transmission bandwidth is improved, but calibration imperfections and distortions increase

Engineering Contradiction:
Improvetransmission bandwidthVSAvoidcalibration imperfections
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

A feedback mechanism is implemented where the output of the analog multiplexer is fed back through a local ADC and into a digital compensation engine. This feedback loop continuously monitors and corrects calibration imperfections such as gain mismatches, timing skew, and non-linearity in real-time, thereby improving reliability while maintaining high transmission bandwidth.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The digital compensation engine performs preliminary correction of distortion parameters before the signal is fully processed. By pre-compensating for known imperfections in the sub-DACs and multiplexer, the system reduces the impact of calibration errors before they degrade the signal quality.

Inventive Principle:
Principle #10Preliminary action

3Ease of operation

If conventional background calibration approach is used to compensate distortions, then calibration is performed online, but additional error of ±0.5 LSB due to integral non-linearity occurs

Engineering Contradiction:
Improveonline calibration capabilityVSAvoideffective number of bits
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent replaces purely digital background calibration with a hybrid approach that incorporates analog-domain compensation. By using a local ADC to capture the actual analog output and feeding it back through a compensation engine, the system substitutes idealized digital correction with measurement-based analog compensation, thereby reducing the ±0.5 LSB quantization error inherent in conventional digital methods.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The system dynamically adjusts distortion compensation parameters based on real-time feedback from the local ADC. By continuously monitoring actual performance and adapting compensation parameters accordingly, the system maintains higher effective number of bits compared to fixed digital calibration approaches.

Inventive Principle:
Principle #35Parameter changes

4Ease of manufacture

If foreground calibration is used to induce reference signal, then calibration is performed offline, but drifts due to variations in time, temperature, or supply voltage cannot be compensated

Engineering Contradiction:
Improvecalibration process simplicityVSAvoidsignal parameter stability
Core Design Contradiction:
Ease of manufactureVSStability of the object's composition

Solution Approach 1:

The patent implements continuous online calibration through the feedback loop, replacing discrete offline foreground calibration. The local ADC continuously monitors the analog output, and the digital compensation engine continuously adjusts distortion parameters, ensuring that calibration remains valid despite drifts caused by temperature, voltage, or time variations.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The calibration system transitions from static offline calibration to dynamic online calibration. The feedback mechanism enables the system to adapt to changing conditions in real-time, making the calibration process dynamic rather than static, thereby compensating for environmental drifts.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12224767B2Signal processing apparatus for use in optical communication
Publication Date: 2025.02.11 HUAWEI TECH CO LTD
  • US12224767B2 patent drawing
  • US12224767B2 patent drawing
  • US12224767B2 patent drawing

AI summary

A signal processing apparatus includes a plurality of time-interleaving digital-to-analog converters each configured to sample a digital input signal at a preset sub-DAC sample frequency, and to generate an analog sub-DAC output signal. The signal processing apparatus includes analog multiplexer that samples the plurality of sub-DAC output signals at a preset multiplexer clock frequency and generates a multiplexer output signal. The signal processing apparatus further includes a local ADC that receives the multiplexer output signal and generate a digital feedback signal. The signal processing apparatus further includes a digital compensation engine that receives the digital feedback signal from the local ADC and determine one or more distortion compensation parameters. The signal processing apparatus further includes a digital pre-processing stage that receives the one or more distortion compensation parameters from the digital compensation engine and performs distortion compensation pre-processing on the digital input signal.