Interleaved DAC Switching for High-Bandwidth Analog Output
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Solution Overview
Problem
High-speed digital-to-analog converters (DACs) face limitations in generating high-bandwidth analog signals due to sensitivity to imperfections in analog multiplexer matching and interference terms, which are challenging to suppress without precise matching of analog circuit characteristics.
Innovation Solution
A controlled switch apparatus with N inputs and a single output, where each input is connected to the output in different states, utilizing a control signal to switch between states and generate high-bandwidth analog signals by capturing data transitions between adjacent analog samples, thereby achieving twice the throughput with a slower clock signal and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If an analog multiplexer is used to combine outputs from multiple sub-DACs, then the bandwidth of the DAC can be increased, but the system becomes very sensitive to imperfections in the matching of analog circuit characteristics
Solution Approach 1:
The patent replaces the mechanical/analog multiplexer switching system with a digital signal processing approach. Instead of using an analog multiplexer to combine sub-DAC outputs, the invention uses digital summation of the sub-DAC outputs after they have been converted to digital form, thereby eliminating the sensitivity to analog matching imperfections while maintaining the bandwidth enhancement benefit
Solution Approach 2:
The patent introduces a digital domain as an intermediary between the sub-DACs and the final output. By converting sub-DAC outputs to digital form and performing summation in the digital domain, the system avoids direct analog signal interaction that would require precise matching, thus resolving the contradiction between bandwidth and matching precision
2Productivity
If a high-speed clock signal is used to achieve high throughput in DAC, then the bandwidth increases, but the power consumption increases
Solution Approach 1:
The patent divides the high-throughput DAC function into multiple parallel sub-DACs operating at lower clock rates. By segmenting the conversion task across multiple units that process data in parallel, the system achieves high overall throughput without requiring each individual unit to operate at high speed, thereby reducing power consumption
Solution Approach 2:
The patent employs interleaved periodic sampling across multiple sub-DACs, where each sub-DAC operates at a lower clock rate but the combined output achieves higher effective throughput. This periodic interleaving approach allows the system to maintain high productivity while using slower clock signals that consume less power
Data Source
AI summary
A controlled switch having N inputs and a single output (N≥2) is switchable between N states. In each state a respective one of the inputs is connected to the single output. There are N sources of sub-streams of analog samples, each sub-stream composed of pairs of adjacent analog samples. Each source is coupled to a respective one of the inputs. In operation, the controlled switch is controlled by a control signal to switch between the N states. While the controlled switch is in any one of the states, a data transition occurs between two adjacent analog samples in the sub-stream whose source is coupled to the input that is connected to the single output. The single output yields the high-bandwidth analog signal. Any pair of adjacent analog samples in any one of the sub-streams substantially determines a corresponding pair of adjacent analog samples in the high-bandwidth analog signal.