Interleaved Multi-Die Circuits for Power Supply Droop Reduction
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Solution Overview
Problem
Programmable integrated circuits, such as FPGAs, face challenges in managing power delivery noise due to high supply current draws, leading to voltage droop issues, which are exacerbated by the complexity of power domains and cross-domain signals, making it difficult to mitigate noise effectively.
Innovation Solution
The solution involves operating groups of circuits in multiple integrated circuit dies sequentially or with interleaved delays to align high current events, reducing peak current draw and voltage droop by staggering the execution of operation threads across different dies, thereby improving operational efficiency without significantly increasing noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If groups of circuits in multiple integrated circuit dies operate simultaneously, then productivity is improved, but power supply voltage droop increases due to peak current draw
Solution Approach 1:
The patent applies periodic action by implementing interleaved operation schedules where groups of circuits in different dies are activated in alternating time slots rather than simultaneously. This periodic activation pattern distributes peak current draws over time, preventing voltage droop while maintaining overall system productivity through coordinated parallel processing across multiple dies.
2Productivity
If high current events are aligned across multiple dies, then productivity is improved, but power delivery noise increases
Solution Approach 1:
The patent uses periodic action by scheduling high current events in different dies at different time intervals. Instead of aligning all high current events simultaneously for maximum productivity, the system employs periodic activation patterns that stagger these events, thereby distributing noise generation over time while still achieving coordinated processing across multiple dies.
3Reliability
If sequential operation is used to reduce voltage droop, then power supply voltage stability is improved, but productivity decreases
Solution Approach 1:
The patent applies segmentation by dividing the circuit system into multiple independent dies, each capable of autonomous operation. This segmentation allows different groups of circuits in different dies to operate in staggered sequences, reducing voltage droop through distributed timing while maintaining overall system productivity through parallel processing capabilities across the segmented dies.
Solution Approach 2:
The patent combines periodic action with segmentation by implementing interleaved operation schedules across segmented dies. Groups of circuits in different dies are activated in periodic time slots, allowing sequential operation within each die for voltage stability while achieving parallel processing across dies for maintained productivity.
4Object-generated harmful factors
If interleaved delays are applied to operation threads, then power delivery noise is reduced, but device complexity increases
Solution Approach 1:
The patent applies periodic action by implementing regular, predictable interleaved delay patterns in operation schedules. This periodic structure simplifies the coordination complexity compared to arbitrary delays, as the timing patterns become systematic and easier to manage through standardized scheduling protocols across multiple dies.
Data Source
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AI summary
A circuit system includes a first integrated circuit die (312) having a first group of circuits configured to perform a first set of operations. The circuit system also includes a second integrated circuit die (313) having a second group of circuits configured to start performing a second set of operations with a delay after the first group of circuits starts performing the first set of operations to reduce power supply voltage droop. The operations performed by the first and second groups of circuits can be interleaved with a fixed or a variable delay. Logic circuits can be partitioned into the first and the second groups of circuits based on predicted switching activity of the logic circuits. Decoupling capacitors (721-723) in integrated circuit dies can be coupled together to reduce droop in a supply voltage during a high current event.