Interleaved Drain Electrode Layout for Low-Resistance HEMTs

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Solution Overview

Problem

Existing high electron mobility transistors face challenges in reducing energy consumption and on-state resistance to cope with increased integration density.

Innovation Solution

A semiconductor device design featuring alternately arranged first and second electrode units with differing base areas and contact resistances, utilizing p-type semiconductor layers and metal electrodes to form Schottky barrier diodes and ohmic contacts, respectively, to optimize current flow and reduce energy consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the integration density of high electron mobility transistors is increased, then the device capacity and functionality are improved, but the energy consumption and on-state resistance increase

Engineering Contradiction:
Improveintegration densityVSAvoidenergy consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The drain structure is segmented into multiple electrode units (first and second electrode units) with different base areas, arranged in an interleaved pattern. This segmentation allows different regions to have different contact resistances, optimizing current distribution and reducing overall energy consumption while maintaining high integration density

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different electrode units are designed with different base areas to create local variations in contact resistance. The first electrode units have smaller base areas with higher contact resistance, while the second electrode units have larger base areas with lower contact resistance. This local quality differentiation optimizes the balance between current conduction and energy consumption in high-density integration

Inventive Principle:
Principle #3Local quality

2Productivity

If the integration density of high electron mobility transistors is increased, then the device capacity and functionality are improved, but the on-state resistance increases

Engineering Contradiction:
Improveintegration densityVSAvoidon-state resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The drain structure is divided into multiple electrode units with different base areas arranged in an interleaved pattern. This segmentation creates a distributed resistance network where current can flow through multiple paths with different resistance values, effectively reducing the overall on-state resistance while maintaining high integration density

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first and second electrode units are designed with asymmetric base areas, creating intentional resistance differences. This asymmetric design allows optimization of current flow distribution, reducing hot spots and minimizing overall on-state resistance in high-density transistor arrays

Inventive Principle:
Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design reduces energy consumption and suppresses voltage overshoot, enhancing device reliability and breakdown voltage through optimized contact areas and resistance values.

Implementation Method 1

Each of the first electrode units includes a p-type semiconductor layer and a first metal electrode over the p-type semiconductor layer

Methodology Applied
Scientific EffectSchottky barrier:

Implementation Method 2

Each of the second electrode units includes a second metal electrode. The second metal electrode has a second base area that is greater than the first base area

Methodology Applied
Scientific EffectOhmic contact:

Data Source

PatentUS20260090067A1Semiconductor device
Publication Date: 2026.03.26 HON HAI PRECISION INDUSTRY CO LTD
  • US20260090067A1 patent drawing
  • US20260090067A1 patent drawing
  • US20260090067A1 patent drawing

AI summary

A semiconductor device includes a substrate structure, a source structure, a drain structure, and a gate structure. The substrate structure includes a semiconductor layer. The source structure, the drain structure, and the gate structure are over the semiconductor layer of the substrate structure and are arranged along a first direction. The drain structure includes a plurality of first electrode units and a plurality of second electrode units arranged alternately along a second direction. The second direction is substantially perpendicular to the first direction. Each of the first electrode units includes a p-type semiconductor layer and a first metal electrode over the p-type semiconductor layer. The p-type semiconductor layer has a first base area. Each of the second electrode units includes a second metal electrode. The second metal electrode has a second base area that is greater than the first base area.