Interleaved FEC Encoding for Burst-Error-Resistant Data Streams
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Solution Overview
Problem
Existing data communication systems are inadequate in handling the high demands of data storage and transfer, particularly in transferring multimedia files, and require improved error correction techniques.
Innovation Solution
The implementation of a communication device that aligns data streams with RS symbols, interleaves them using a convolutional interleaver, and generates Hamming parity blocks for error correction, which are then distributed across physical channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Reed-Solomon codes are used for error correction in conventional communication systems, then data transmission reliability is improved, but transmission overhead increases and power consumption rises
Solution Approach 1:
The patent segments the error correction process into two independent stages: first applying Reed-Solomon encoding to data blocks, then applying convolutional interleaving and Hamming parity to the encoded symbols. This segmentation allows each error correction mechanism to operate optimally on its designated data format, reducing overall overhead compared to using Reed-Solomon alone for all error correction needs.
Solution Approach 2:
The patent implements dynamic adaptability by allowing the communication device to switch between different encoding modes (RS-only, RS+Hamming, or convolutional interleaving only) based on channel conditions and performance requirements. This dynamic approach optimizes the balance between reliability and overhead for different operational scenarios.
2Reliability
If Reed-Solomon codes are used for error correction, then data transmission reliability is improved, but power consumption increases
Solution Approach 1:
The patent divides error correction into multiple lighter-weight stages (RS encoding followed by Hamming/convolutional encoding) rather than relying solely on computationally intensive RS decoding. This segmentation reduces the processing power required at each stage, thereby lowering overall power consumption while maintaining or improving reliability.
Solution Approach 2:
The patent changes the operational parameters of error correction by introducing configurable encoding rates and interleaving depths. By adjusting these parameters based on channel conditions, the system optimizes the balance between power consumption and reliability, using more aggressive error correction only when necessary.
3Reliability
If convolutional interleaving is applied to RS symbols, then resistance to burst errors is improved, but device complexity increases
Solution Approach 1:
The patent segments the interleaving operation into a systematic convolutional process that operates on fixed-size RS symbol groups. This segmentation into manageable, repeating patterns reduces the complexity of implementation compared to arbitrary interleaving schemes, while still providing effective burst error protection through the distributed symbol arrangement.
4Reliability
If Hamming parity blocks are generated for RS symbol sections, then error correction capability is improved, but transmission overhead increases
Solution Approach 1:
The patent applies Hamming parity locally to specific RS symbol sections rather than globally to entire data blocks. This localized approach provides targeted error correction where it is most needed while minimizing the overall overhead, as only specific portions of the data stream receive the additional Hamming redundancy.
Data Source
AI summary
A communication device includes a convolutional interleaver and an encoder. The convolutional interleaver is configured to receive first codewords encoded using a first error-correcting code. The first codewords include symbols. The convolutional interleaver is configured to distribute the symbols from the first codewords into a second codeword to improve robustness to burst errors. The distribution of the symbols is performed by way of interleaving symbols from different first codewords into the second codeword. The encoder is configured to encode the second codeword using a second error-correcting code, which is different from the first error-correcting code, by appending error-correcting bits to the second codeword.