Interleaved FET Body and Gate Contacts for High Threshold Frequency
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Solution Overview
Problem
Existing semiconductor device fabrication techniques face challenges in designing low-noise and power amplifiers with multiple-finger field-effect transistors, as body contacts can reduce the threshold frequency while attempting to reduce gate resistance and improve signal amplification efficiency.
Innovation Solution
The proposed structure includes trench isolation regions and body contact regions extending through these regions to the substrate, with gate connectors and contacts positioned over the trench isolation, allowing for the formation of field-effect transistors with interleaved body and gate contacts to maintain high threshold frequency and low noise factors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If body contacts are added to bias the body of the field-effect transistor, then the body can be properly biased for signal amplification, but the threshold frequency of the field-effect transistor is reduced
Solution Approach 1:
The patent introduces body contacts that extend vertically through the trench isolation region from the top surface to the substrate, utilizing the vertical dimension to provide body biasing without lateral expansion. This vertical configuration allows body contacts to be positioned beneath the gate structure, enabling proper body biasing while maintaining horizontal space constraints and preserving high threshold frequency characteristics.
2Loss of energy
If gate contacts are placed over the active region to reduce gate resistance, then gate resistance is reduced for better signal amplification, but special enabling measures are required
Solution Approach 1:
The patent merges the gate contact structure with the existing trench isolation region by positioning gate contacts over the active region and having them extend through the trench isolation. This integration allows gate contacts to be formed as part of the standard trench isolation process flow, reducing gate resistance without requiring separate special enabling fabrication steps.
3Power
If multiple-finger field-effect transistor structure is used, then signal amplification efficiency is improved, but the structure becomes more complex
Solution Approach 1:
The patent divides the gate structure into multiple parallel gate fingers that extend between source and drain regions, with each finger providing independent control over a portion of the channel. This segmentation increases the total gate width and improves signal amplification efficiency while maintaining a modular structure that can be fabricated using standard photolithography and deposition processes.
Data Source
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AI summary
Structures including a field-effect transistor and methods of forming a structure including a field-effect transistor are disclosed. The structure comprises a trench isolation region in a substrate, and a body contact region (28) that extends through the trench isolation region to the substrate. The structure further comprises a field-effect transistor including a gate connector (20), a first gate finger (18) that extends from the gate connector, a second gate finger (18) that extends from the gate connector, and a source/drain region (24, 26) disposed between the first gate finger and the second gate finger. The gate connector is positioned over the trench isolation region. The structure further comprises a gate contact (40) coupled to the gate connector, and a body contact (44) that penetrates through a portion of the gate connector to the body contact region (28).