Interleaved FFT Parallel Processing Architecture

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Solution Overview

Problem

Current methods for computing Fast Fourier Transforms (FFTs) are inefficient and lack parallel processing capabilities, which hinders their speed and effectiveness in various applications.

Innovation Solution

An interleaved method that intertwines the output of shifted Fourier matrices FC and FD to compute the FFT, utilizing even-odd extension theorems and parallel implementation techniques to reduce computational complexity and enable parallel processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If sequential FFT computation methods are used, then implementation simplicity is maintained, but computational speed and processing efficiency are insufficient

Engineering Contradiction:
Improvecomputational speedVSAvoidprocessing structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent divides the FFT computation into multiple independent segments that can be processed in parallel. Different processor groups handle different subsets of input data simultaneously, with each group performing specific computational tasks (such as computing different output locations or different transform stages) without requiring sequential execution, thereby achieving speedup while maintaining manageable complexity through modular organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces parallel processing dimensions by organizing computation across multiple processors working simultaneously. Instead of a single sequential computation path, the invention creates a multi-dimensional processing architecture where computations are distributed across spatial dimensions (multiple processors) and temporal dimensions (parallel execution stages), transforming the computational approach from one-dimensional sequential to multi-dimensional parallel execution.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If parallel processing structure is implemented, then computational efficiency is improved, but implementation complexity increases

Engineering Contradiction:
Improvecomputational throughputVSAvoidparallel processing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The computation is segmented into independent tasks that can be assigned to different processors. Each processor group handles specific computational segments (such as different output locations or data subsets) with well-defined input-output relationships, allowing parallel execution while keeping individual processor tasks simple and manageable, thus improving throughput without excessive complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent designs a universal parallel processing framework where processor groups can handle multiple types of computations through the same basic structure. The interleaved FFT algorithm uses a unified approach that can compute different output locations and handle different data configurations using the same parallel processing paradigm, reducing implementation complexity by avoiding specialized handling for each computation type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Loss of time

If traditional FFT algorithms are used, then computational accuracy is maintained, but computational time is excessive

Engineering Contradiction:
Improvecomputational timeVSAvoidprocessing efficiency
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The patent performs preliminary organization of input data into interleaved patterns before the main computation stages. By pre-arranging data in the interleaved format and pre-computing certain intermediate values or transformation matrices, the algorithm reduces the computational workload during the main processing stages, thereby decreasing overall computational time while maintaining accuracy through careful preservation of numerical relationships.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The parallel processing structure ensures continuous utilization of computational resources across multiple processors. Instead of idle periods between sequential computation stages, all processors remain actively engaged in useful computations throughout the execution, with data flowing continuously between processing stages. This continuous action maximizes processing efficiency and reduces total computational time compared to sequential methods with idle periods.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS8606839B2Interleaved method for parallel implementation of the fast fourier transform
Publication Date: 2013.12.10 MUGLER DALE
  • US8606839B2 patent drawing
  • US8606839B2 patent drawing
  • US8606839B2 patent drawing

AI summary

A method for computing a fast Fourier transform (FFT) in a parallel processing structure uses an interleaved computation process. In particular, the interleaved FFT computation process intertwines the output of two different shifted Fourier matrices to obtain a Fourier transform of an input vector. Next, an even-odd extension process is applied to the transformed input vector, whereupon various terms are grouped in a computational tree. As such, the resulting segmentation of the computation allows the fast Fourier transform to be computed in a parallel manner.