Interleaved Memory Codeword Transmission for Multi-Bit Error Detection

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Solution Overview

Problem

Consecutive transmission of codewords in memory devices is prone to localized interference, leading to limited detection of multi-bit errors and potential failure in error protection techniques.

Innovation Solution

Interleaving codewords in an alternating or checkerboard pattern across different unit intervals and data channels to increase the likelihood of errors occurring in multiple codewords, enhancing the probability of detecting multi-bit errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If codewords are transmitted consecutively in memory devices, then transmission efficiency is maintained, but localized interference occurs leading to limited detection of multi-bit errors

Engineering Contradiction:
Improvedetection of multi-bit errorsVSAvoidtransmission efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the transmission process by dividing codewords into separate transmission groups with different interleaving factors. Some codewords are transmitted with higher interleaving (spreading across more channels/time) while others use lower interleaving, allowing differential protection against localized interference while maintaining overall transmission efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different portions of the data stream receive different interleaving treatments based on their specific error detection needs. The patent applies variable interleaving factors to different codewords or data segments, providing localized error protection where needed while maintaining standard transmission elsewhere.

Inventive Principle:
Principle #3Local quality

2Reliability

If codewords are interleaved across multiple channels to detect multi-bit errors, then error detection capability improves, but transmission complexity increases

Engineering Contradiction:
Improveerror detection capabilityVSAvoidtransmission complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the interleaving operation into segments with different interleving factors applied to different codeword groups. This segmentation allows the system to achieve error detection across multiple channels without requiring all codewords to undergo complex multi-channel interleaving, thus reducing overall transmission complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the interleaving factor parameter dynamically or selectively across different codewords. By adjusting this parameter, the system optimizes error detection capability for specific data segments while maintaining manageable transmission complexity for the overall system.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12399777B2Interleaved codeword transmission for a memory device
Publication Date: 2025.08.26 MICRON TECHNOLOGY INC
  • US12399777B2 patent drawing
  • US12399777B2 patent drawing
  • US12399777B2 patent drawing

AI summary

Methods, systems, and devices for memory operations are described. A first code for detecting one or more errors in a first set of bits of data and a second code for detecting one or more errors in a second set of bits of data may be generated. The first set of bits and the second set of bits may be transmitted over a channel between a memory device and a host device in an interleaved pattern. The first code and the second code may also be transmitted over the channel. The first set of bits and the second set of bits may be deinterleaved by the receiving device. The first set of bits and the second set of bits may also be processed by the receiving device using the first code and the second code.