Interleaved Switching Mixer Clocking to Eliminate LO Delay Mismatch

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Solution Overview

Problem

Conventional switched-mode mixers in RF transmitters face performance impairments due to propagation delays in local oscillator signals, especially at higher frequencies, which affect the suppression of carrier and sideband frequencies.

Innovation Solution

A high-frequency transmit circuit generates matched differential interleaved local oscillator signals using a quadrature generator and frequency divider circuit, eliminating inherent imbalances and propagation delays by selectively passing pulses through a switching mixer with a matched switching topology.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional switched-mode mixers use interleaved local oscillator signals, then the mixer can achieve improved noise and linearity performance, but propagation delays in the generated local oscillator signals impair mixer performance

Engineering Contradiction:
Improvemixer performanceVSAvoidpropagation delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the local oscillator signal generation into separate matched paths for in-phase and quadrature components. Each path is segmented to have identical circuit topology, ensuring that propagation delays are equalized across both paths. This segmentation allows the mixer to receive synchronized local oscillator signals without the timing mismatches that would otherwise degrade performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent intentionally introduces asymmetry in the form of matched delay elements that compensate for inherent path differences. By adding equal delay to both in-phase and quadrature local oscillator paths, the system creates a symmetric timing relationship despite asymmetric physical routing, thereby eliminating propagation delay mismatches that would impair mixer operation.

Inventive Principle:
Principle #4Asymmetry

2Productivity

If higher frequency transmitters are used to support high-bandwidth applications, then data transmission capability is improved, but propagation delay issues become more problematic

Engineering Contradiction:
Improvedata transmission capabilityVSAvoidpropagation delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent changes the timing parameters of the local oscillator signals by introducing matched delay elements. These delay elements are designed to equalize the propagation delays in both signal paths, ensuring that even at higher frequencies where timing is critical, the in-phase and quadrature components arrive simultaneously at the mixer. This parameter adjustment allows high-frequency operation without suffering from propagation delay mismatches.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If resistive summation is used to combine I and Q signals, then the mixing operation is simplified, but 50% efficiency loss occurs

Engineering Contradiction:
Improvemixing operation simplicityVSAvoidefficiency loss
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent replaces the resistive summation mechanism with a switched-mode combining approach. Instead of using resistors to algebraically combine the in-phase and quadrature signals (which dissipates 50% of the power), the invention uses electronic switches controlled by local oscillator signals to time-multiplex the combination. This substitution eliminates the inherent efficiency loss of resistive networks while maintaining the simplicity of the mixing operation.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS8077803B2Quarter duty cycle pulse generator for interleaved switching mixer
Publication Date: 2011.12.13 NXP USA INC
  • US8077803B2 patent drawing
  • US8077803B2 patent drawing
  • US8077803B2 patent drawing

AI summary

An integrated transmit circuit includes a voltage controlled oscillator (702) for generating an input frequency signal (e.g., VCO) that is provided to a divide by two quadrature generator circuit (706) which generates therefrom in-phase and quadrature clocking signals (I, IB, Q, QB) that are applied to control a plurality of transmission gates (711-718) configured in a matched switching topology (710) so as to selectively pass pulses from the input frequency signal, thereby generating interleaved LO pulses (Ø1, Ø1B, . . . Ø4, Ø4B). By applying the interleaved LO pulses to control the transmission gates (26, 28, 30, 32, 34, 36, 38, and 40) in the upmixer (720), the +I, −I, +Q, −Q input signals are interleaved over a plurality of phases of a carrier period to produce differential outputs (42, 44).