Interleaved PFC Switching Control for Balanced Inductor Currents
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Solution Overview
Problem
In power factor correction circuits operating in critical mode, the challenge lies in maintaining effective interleaved operations due to imbalanced inductor currents and heat generation issues, which can lead to inefficiencies and limited output power.
Innovation Solution
A switching control circuit that includes detection and correction mechanisms to synchronize the switching of transistors based on detected time differences and current ratios, ensuring balanced inductor currents and maintaining an interleaved operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If two transistors are turned on with a predetermined time difference in a critical mode PFC circuit, then the interleaved operation is performed to reduce switching ripple components, but the switching frequencies cannot be followed and the interleaved operation becomes ineffective
Solution Approach 1:
The patent employs feedback mechanisms where the control circuit continuously monitors the switching frequencies of both transistors and dynamically adjusts the time difference between their switching cycles. This feedback loop ensures that the interleaved operation remains effective even when switching frequencies need to be followed, resolving the contradiction between maintaining interleaved operation effectiveness and adapting to switching frequency changes
Solution Approach 2:
The patent implements dynamic adjustment of the time difference between transistor switching cycles based on real-time operating conditions. The control circuit modifies the phase shift between transistors dynamically rather than using a fixed predetermined time difference, allowing the system to adapt to changing switching frequencies while maintaining effective interleaved operation
2Ease of operation
If two transistors are turned on with the same ON period according to the output voltage, then the switching is simplified, but the peak currents of the inductor currents are not equal causing heat generation imbalance
Solution Approach 1:
The patent applies local quality adjustment by maintaining a common ON period for both transistors while introducing individualized phase shifts for each transistor. This allows the switching control to remain simple with a unified timing parameter, while the localized phase adjustments compensate for inductor current imbalances and equalize peak currents, thereby balancing heat generation across both transistors
Solution Approach 2:
The patent changes the timing parameters of transistor switching by introducing different phase shifts while keeping the ON period constant. This parameter modification approach maintains switching simplicity through a single ON period setting, while the phase shift adjustments individually optimize each transistor's operation to achieve equal peak currents and balanced heat generation
3Adaptability or versatility
If inductance values of the inductors are imbalanced, then the inductor configuration is flexible, but the peak currents are not equal leading to heat generation that limits output power
Solution Approach 1:
The patent uses feedback control to monitor the peak currents of both inductors and dynamically adjusts the phase shifts of the transistors accordingly. This feedback mechanism compensates for inductance value imbalances by modifying the switching timing, ensuring that peak currents remain equal despite different inductance values, thereby preventing heat generation imbalances that would limit output power
Data Source
AI summary
A switching control circuit for a power supply circuit including first and second inductors, and first and second transistors controlling first and second inductor currents flowing through the first and second inductors, respectively. The switching control circuit includes: a detection circuit detecting a switching period of the first transistor and a time difference between first and second timings, at which the first and second inductor currents respectively reach first and second predetermined values; an error output circuit outputting an error between a predetermined ratio and a ratio of the time difference to the switching period; and a driving signal output circuit configured to output a driving signal to turn on the second transistor, after the second inductor current reaches the second predetermined value, and to turn off the second transistor, in response to a second time period according to the first time period and the error having elapsed.