Interleaved Power Converter Crossover Distortion Control
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Solution Overview
Problem
Interleaved power converters in boundary conduction mode experience crossover distortion due to high switching frequency near zero-crossing points, leading to prolonged zero-current situations and distorted current waveforms, which result in high total harmonic distortion (THD) and reduced power factor.
Innovation Solution
A circuit arrangement and method that includes a signal processor to disable interleaved circuits when the input voltage is lower than a threshold voltage, reducing switching frequency and increasing current amplitude, thereby reducing zero-crossing time and THD, and enabling high power factor operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If interleaved power converters operate in boundary conduction mode with high switching frequency near zero-crossing points, then power factor correction is achieved, but crossover distortion occurs and total harmonic distortion increases
Solution Approach 1:
The patent applies dynamics by making the switching frequency variable rather than fixed. The control system dynamically adjusts the switching frequency based on the instantaneous input voltage level, particularly reducing frequency near zero-crossing points to avoid EMI filter attenuation and reduce crossover distortion, while maintaining high frequency operation during voltage peaks for efficient power factor correction.
Solution Approach 2:
The patent changes the switching frequency parameter dynamically throughout the AC cycle. By modulating the switching frequency according to the input voltage waveform, the system optimizes power factor correction during high voltage periods while minimizing distortion during zero-crossing transitions, effectively resolving the contradiction between PF correction and waveform quality.
2Power
If switching frequency is increased near zero-crossing points to maintain power conversion, then energy transfer is improved, but EMI filter attenuation prolongs zero-current situations and distorts current waveform
Solution Approach 1:
The system dynamically adjusts switching frequency based on operating conditions. Near zero-crossing points where EMI filter attenuation becomes problematic, the frequency is reduced to allow sufficient current rise time without excessive attenuation. During voltage peaks where energy transfer is critical, frequency is increased to maintain high power conversion efficiency.
Solution Approach 2:
The patent implements periodic modulation of the switching frequency synchronized with the AC input cycle. The switching pattern is periodically adjusted to account for the sinusoidal nature of the input voltage, creating a rhythm of high-frequency operation during peaks and low-frequency operation during zero-crossings, which resolves the conflict between energy transfer and waveform quality.
3Manufacturing precision
If multiple interleaved circuits are operated in parallel, then input current ripple is reduced, but device complexity and control difficulty increase
Solution Approach 1:
The patent divides the power conversion function into multiple interleaved circuit stages operating in parallel. Each stage processes a portion of the input current, and by offsetting their switching phases, the individual current ripples cancel each other out, resulting in significantly reduced total input current ripple and improved waveform quality.
Solution Approach 2:
The patent combines multiple interleaved circuit stages into a unified power conversion system. By merging the output currents of individual stages that are phase-shifted relative to each other, the system achieves reduced ripple and improved power factor correction while sharing common components such as EMI filters and control logic, thereby managing complexity.
Data Source
AI summary
A circuit arrangement, signal processor, and method for interleaved switched boundary mode power conversion are disclosed. The circuit arrangement comprises at least an input for receiving an alternating input voltage from a power supply; an output to provide an output voltage to a load; a first interleaved circuit comprising: a first energy storage device; and a first controllable switching device; and one or more secondary interleaved circuits, each comprising: a secondary energy storage device; and a secondary controllable switching device; and a signal processor. The signal processor is connected to the controllable switching devices and comprises at least a first switching cycle controller, configured for cycled zero-current switching operation of the first controllable switching device; and one or more secondary switching cycle controllers, configured for cycled zero-current switching operation of the one or more secondary controllable switching devices The signal processor is configured to disable one or more of the interleaved circuits when the alternating input voltage is lower than a first threshold voltage to reduce the zero-crossing time.