Interleaved Ring Oscillator for Low-Power Non-Overlapping Clocks
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Solution Overview
Problem
Energy harvesting systems face challenges in generating non-overlapping clocks efficiently at low power consumption, especially in energy-constrained applications like wireless sensor nodes, where conventional clock generators consume significant energy and lead to increased power loss due to shoot-through currents and high frequency operation.
Innovation Solution
An ultra-low power Interleaved Ring Oscillator (IRO) design is proposed, utilizing two interleaved ring oscillator chains operating at the same frequency but out of phase, with gated current sources to control phase charge and discharge, and power-gated buffers to minimize shoot-through currents, generating non-overlapping clock phases with reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional clock generators are used to generate non-overlapping clocks, then the clock generation function is achieved, but power consumption increases significantly
Solution Approach 1:
The clock generator is divided into two separate ring oscillator chains, each generating one phase of the non-overlapping clocks. This segmentation allows independent optimization of each chain and reduces the overall power consumption while maintaining reliable clock generation through the interleaved structure.
Solution Approach 2:
The patent employs periodic switching of current sources to control the charging and discharging of capacitors in the ring oscillators. This periodic action enables precise control of oscillation frequency and phase, achieving reliable non-overlapping clock generation with reduced power consumption compared to conventional continuous operation circuits.
2Productivity
If high frequency operation is used to improve clock speed, then productivity increases, but power loss due to shoot-through currents increases
Solution Approach 1:
The patent applies preliminary anti-action by using carefully timed non-overlapping clock phases to prevent shoot-through currents before they can occur. The interleaved ring oscillator structure ensures that complementary switches are never on simultaneously, eliminating the harmful shoot-through effect that would otherwise increase power loss at high frequencies.
Solution Approach 2:
The patent uses dynamically controlled current sources that are switched on and off periodically to charge and discharge capacitors in the ring oscillators. This dynamic control allows the circuit to operate efficiently at high frequencies by adjusting current flow timing, thereby maintaining high clock speed while minimizing energy loss from shoot-through currents.
Data Source
AI summary
An interleaved ring oscillator includes a first ring oscillator having n stages, and a second ring oscillator having n stages, wherein each stage includes a nth first gated inverter in the first ring oscillator and a nth second gated inverter in the second ring oscillator, such that output from the nth first gated inverter enables the nth second gated inverter, and output from the nth second gated inverter enables the nth first gated inverter.