Interleaved Sampler Offset Tone Suppression

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Solution Overview

Problem

In hard-drive systems, existing sampling techniques struggle to accurately measure low-level signals amidst noise and interference, particularly in sensitive measurements like head flying-height and overwrite effectiveness, due to the introduction of tones and noise from sampler offsets.

Innovation Solution

An interleaved sampler system with multiple sample and hold circuits and a multiplexer configuration that samples at a higher rate, using a sequence generator to control the clocking of sample and hold circuits and multiplexers to couple them in a pseudorandom pattern, effectively reducing tone generation and interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If interleaved sampling is used to achieve high data rates and low latency, then sampling speed is improved, but offset-induced tones and noise are introduced that interfere with low-level signal measurements

Engineering Contradiction:
Improvesampling rateVSAvoidoffset-induced tones and noise
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent extracts and removes the harmful offset-induced tones from the sampled signal by identifying and eliminating the specific frequency components generated by sampler offsets, thereby preserving the beneficial high sampling rate while removing the interfering artifacts

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent converts the harmful offset-induced tones into useful information by using them as reference signals for calibration and correction purposes, transforming the interference into a means for improving measurement accuracy

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Productivity

If multiple sample and hold circuits are used in parallel to increase sampling rate, then productivity is improved, but device complexity increases due to the need for multiplexing and synchronization

Engineering Contradiction:
Improveeffective sampling rateVSAvoidmultiplexer and synchronization circuitry
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the sampling function into multiple parallel sample and hold circuits, each operating at a lower individual rate but collectively achieving a higher effective sampling rate through interleaved operation, thereby distributing the complexity across modular units

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges the outputs of multiple sample and hold circuits through a multiplexer that combines their individual sample streams into a single high-rate output sequence, achieving productivity improvement while managing complexity through systematic integration

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If sampler offsets are present in interleaved sampling circuits, then manufacturing simplicity is maintained, but measurement precision deteriorates due to tone interference

Engineering Contradiction:
Improvesampler circuit implementationVSAvoidlow-level signal detection accuracy
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent implements feedback mechanisms that monitor the output signals for offset-induced tones and use this information to adjust and correct the sampling process, thereby maintaining measurement precision without requiring complex manufacturing modifications

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent changes the operational parameters of the sampling system by introducing deliberate timing adjustments and phase shifts that alter the frequency characteristics of offset-induced tones, moving them away from problematic frequency ranges and improving measurement precision

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8737003B2Offset-induced signal cancellation in an interleaved sampling system
Publication Date: 2014.05.27 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8737003B2 patent drawing
  • US8737003B2 patent drawing
  • US8737003B2 patent drawing

AI summary

Described embodiments provide an interleaved sampler having N sample and hold circuits for sampling an input signal, and M multiplexers. Each multiplexer is adapted to couple all N of the plurality of sample and hold circuits to a respective output of the interleaved sampler. The interleaved sampler samples at a sample rate of fs, has an interleaved sampling period of M/fs, where M is greater than one and less than N. Because there are more sample and hold circuits than there are samples taken during an interleaved sampling period, different combinations of the sample and hold circuits are used from interleaved sample period to interleaved sample period. This reduces spurious tones generated from offset voltages when using interleaved sample and hold circuits. The order of the sample and hold circuits are clocked might be random, pseudorandom, or a fixed pattern longer than the interleaved sampling period.