Interleaved Silicon Chip Security Apparatus

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Solution Overview

Problem

Existing security measures for electronic circuits are inadequate in detecting and mitigating fault injection attacks, which can compromise sensitive information by causing faults through physical contact, high-power lasers, or electromagnetic pulses.

Innovation Solution

A protected system is implemented on a silicon chip with a first apparatus performing a functional process and a second apparatus performing a protecting process with a verifiable test result, where the physical layout interleaves parts of both apparatuses, ensuring an attack on one apparatus also affects the other, and a primary controller signals the protecting process during the functional process, with an attack handling controller taking protective actions when the protecting process fails to provide the expected result.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a protecting apparatus is added to detect fault injection attacks, then security reliability is improved, but device complexity increases

Engineering Contradiction:
Improvesecurity reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The protecting apparatus and protected apparatus are merged into a single integrated circuit chip, sharing common physical infrastructure and control resources. This integration reduces overall system complexity while maintaining the dual-functionality of protection and normal operation.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The protecting apparatus is designed to perform multiple functions: detecting fault injection attacks, verifying operational integrity, and controlling access to protected data. This multi-functionality consolidates what could be separate systems into a unified protection mechanism.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If the physical layout interleaves the protecting apparatus with the protected apparatus, then detection capability is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvedetection capabilityVSAvoidlayout precision
Core Design Contradiction:
Measurement precisionVSManufacturing precision

Solution Approach 1:

The chip layout is segmented into distinct but interleaved regions for the protecting apparatus and protected apparatus. This segmentation allows for systematic placement and routing that achieves the required interleaving pattern while maintaining manufacturability through standardized design modules.

Inventive Principle:
Principle #1Segmentation

3Reliability

If the protecting process runs continuously during the functional process, then security protection is improved, but productivity decreases

Engineering Contradiction:
Improvesecurity protectionVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The protecting process operates periodically rather than continuously, performing integrity verification at strategically chosen checkpoints during the functional process. This periodic operation maintains security while minimizing interference with normal processing throughput.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The protecting apparatus continuously monitors for attacks through passive detection mechanisms that do not interrupt the functional process, while active verification occurs at appropriate intervals. This maintains both security protection and processing continuity.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS11055409B2Protected system
Publication Date: 2021.07.06 NUVOTON
  • US11055409B2 patent drawing
  • US11055409B2 patent drawing
  • US11055409B2 patent drawing

AI summary

In one embodiment, a protected system, includes a first apparatus disposed on a silicon chip, and to perform a functional process, a second apparatus disposed on the silicon chip, and to perform a protecting process having a verifiable test result, the first and the second apparatus having a physical layout which interleaves at least part of the first apparatus with at least part of the second apparatus so that an attack on the at least part of the first apparatus also attacks the at least part of the second apparatus, a primary controller to signal the second apparatus to perform the protecting process during a time period that the first apparatus is performing the functional process, and an attack handling controller to perform a protective action to protect the functional process responsively to the protecting process failing to verify the verifiable test result providing an indication that the attack is being performed.