Interleaved Transformer Rectifier Layouts for Output Ripple Reduction
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Solution Overview
Problem
Conventional LLC-SRC converters experience output current ripples and asymmetry due to differences in parasitic resistances and inductances in conductive wires, which deteriorate the interleaving effect and increase ripple current in output capacitors, especially in low-voltage and high-current applications.
Innovation Solution
The proposed solution involves a converter circuit with multiple transformers and rectifiers arranged symmetrically around common output capacitors, ensuring symmetrical rectifier outputs and reducing output ripples through specific layouts and electrical connections, such as parallel connections of rectifier outputs to capacitors and series connections of transformer primary windings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional LLC-SRC converter is used, then the design is simple and ZVS/ZCS operation is achieved, but output current has large ripples and asymmetry due to parasitic resistances and inductances
Solution Approach 1:
The converter is divided into multiple parallel-connected LLC-SRC modules (first converter and second converter), each with its own transformer and rectifier. This segmentation allows the output currents to be interleaved, reducing the total output ripple current while maintaining the simplicity of individual module designs.
Solution Approach 2:
Multiple converter modules are merged in parallel with their outputs connected to common output capacitors. The combined output of multiple converters with interleaved switching phases reduces output current ripples and asymmetry while maintaining the advantages of each individual converter module.
2Productivity
If parallel-interleaved LLC-SRC is used, then output power and power density increase, but asymmetry due to different wire lengths increases ripple current in output capacitors
Solution Approach 1:
The patent acknowledges the inherent asymmetry caused by different wire lengths in parallel-interleaved converters but addresses it through careful layout design and positioning of components to minimize the impact of parasitic differences on output ripple current.
Solution Approach 2:
The solution moves from a single-plane layout to a three-dimensional arrangement with sub-boards positioned at different heights and locations. First rectifiers and first output capacitor are on a first sub-board, while second rectifiers and second output capacitor are on a second sub-board, allowing optimization of current paths and reduction of parasitic effects.
3Productivity
If rectifier outputs are connected to common output capacitor, then power density increases, but parasitic resistances and inductances cause asymmetry and increased ripple
Solution Approach 1:
The patent positions output capacitors and rectifiers to create more balanced current paths, reducing potential differences and parasitic effects. By strategically placing components to achieve more equal electrical paths from each rectifier to the common output, the asymmetry caused by parasitic resistances and inductances is minimized.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This arrangement enhances the interleaving effect, reducing output ripples and improving the efficiency of the converter circuit by ensuring symmetrical rectifier outputs and minimizing the impact of parasitic resistances and inductances, thereby increasing power density and reducing component stress.
Implementation Method 1
a first converter and a second converter, each converter including a switch network circuit, a first transformer and a second transformer, each transformer having a primary winding and at least one secondary winding
Implementation Method 2
the first and second outputs of the first rectifiers of the first and second converters are electrically parallel-connected to a first output capacitor, and the first and second outputs of the second rectifiers are parallel-connected to a second output capacitor
Data Source
AI summary
The present invention relates to multi-phase parallel-interleaved converter circuits with each phase having two or more transformers and two or more rectifiers electrically coupled to the two or more transformers, and layouts of the transformers and the rectifiers of the multi-phase parallel-interleaved converter circuits. In the layouts, the multiple transformers and the multiple rectifiers of the multi-phase converters are interleavingly arranged to be symmetrical to common output polarized capacitor(s) so as to ensure the rectifier outputs of each phase relative to the common output polarized capacitors is symmetrical, thereby reducing the output ripples of the current of the output capacitors.