Interleaver Memory Allocation by Output Delay to Cut Buffer Waste
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Solution Overview
Problem
Conventional data interleaving methods waste memory addresses as they reserve N+1 memory addresses per data cluster until the last item is output, leading to inefficient memory utilization.
Innovation Solution
A memory size allocation system that dynamically allocates memory addresses based on the output delay of each data item, releasing addresses as soon as items are output, allowing follow-on data clusters to use them, thereby optimizing memory usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory addresses are reserved for each data cluster until the last item is output, then data protection and error reduction are improved, but memory utilization efficiency deteriorates
Solution Approach 1:
The patent implements dynamic memory address allocation where memory addresses are allocated to data items based on their specific output delay requirements. When a data item is output, its memory address is immediately released and made available for new data items. This dynamic allocation allows the system to maintain sufficient buffering for data protection while continuously optimizing memory utilization by releasing addresses as soon as they are no longer needed.
Solution Approach 2:
The system changes the memory allocation parameter from a static block allocation (reserving N+1 addresses per cluster) to a dynamic allocation based on individual data item delay parameters (m×Dm+Pm). This parameter change allows precise allocation of memory resources matching the actual buffering needs of each data item, reducing overall memory waste while maintaining data protection.
2Loss of substance
If memory addresses are released immediately after data items are output, then memory utilization efficiency is improved, but data protection capability deteriorates
Solution Approach 1:
The patent calculates and allocates memory addresses in advance based on the output delay parameters of each data item. The address allocation unit determines the required buffer size (m×Dm+Pm) for each data item before input, ensuring that sufficient memory is reserved to prevent data loss during the delay period. This preliminary action guarantees data protection while optimizing the actual memory usage.
Solution Approach 2:
The system implements a feedback mechanism where the address allocation unit continuously monitors data output status and dynamically adjusts memory address allocation. When data items are output, the system receives feedback and immediately releases the corresponding memory addresses, while simultaneously allocating new addresses for incoming data items based on their delay requirements. This feedback loop maintains data protection while maximizing memory utilization.
Data Source
AI summary
A method and device for interleaving the (N+1) input data and for allocating the corresponding memory comprises the steps of allocating a mth buffer section equals to (m×Dm+Pm) memory address for buffering the mth data of the N+1 input data, where m is a nonnegative integer from 0, 1 to N, Dm is the delay of the mth data, and Pm is a nature number representing a predetermined number of memory address for extra buffering the mth data; assigning an empty memory address in the mth buffer section to buffer the mth data; accessing the mth data from where the mth data buffered after buffering the (N+1) data, and outputting the (N+1) data in a (m×Dm) delay sequence. The present invention allocates the memory address effectively, so applying the present invention economizes the use of the memory request.