Interleaving Bus-Bar Power Module Layout for Low Parasitic Inductance

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Solution Overview

Problem

Conventional power modules with third-generation semiconductors face significant issues with parasitic inductance, leading to phase delay, signal distortion, and reduced efficiency in high-frequency and high-current applications, particularly in electric vehicle inverters, due to uneven current distribution and magnetic field interference.

Innovation Solution

A low parasitic inductance power module design featuring staggered, interleaving conductive members that uniformly distribute current through parallel power devices, with conductive members arranged in a staggered and interleaving manner to cancel out induced magnetic fields, reducing overall parasitic inductance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If conventional power module designs are used, then the module can handle high current, but parasitic inductance increases leading to signal distortion and reduced efficiency

Engineering Contradiction:
Improvecurrent handling capabilityVSAvoidparasitic inductance
Core Design Contradiction:
PowerVSObject-generated harmful factors

Solution Approach 1:

The patent transitions from a planar two-dimensional layout to a three-dimensional staggered interleaving structure. Conductive members are arranged in multiple layers with offset positions, creating a spatial configuration where current paths in adjacent layers are laterally displaced. This dimensional transformation enables the current loops to overlap in the vertical dimension while maintaining lateral separation, effectively reducing the enclosed area and thus parasitic inductance while preserving high current handling capability

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent employs asymmetric positioning of conductive members in the staggered interleaving arrangement. Rather than symmetric placement, the conductive members in adjacent layers are deliberately offset by specific distances (e.g., 0.5-2mm), creating asymmetric current loop geometries. This asymmetry optimizes the cancellation of magnetic fields between adjacent current paths while maintaining structural integrity and electrical performance

Inventive Principle:
Principle #4Asymmetry

2Device complexity

If existing power module layouts are used, then the structure is simple, but current distribution is inhomogeneous causing temperature imbalance

Engineering Contradiction:
Improvestructural simplicityVSAvoidcurrent distribution uniformity
Core Design Contradiction:
Device complexityVSStability of the object's composition

Solution Approach 1:

The patent segments the current distribution by dividing the power module into multiple parallel current paths through the staggered interleaving structure. Each conductive member carries a portion of the total current, and the segmented arrangement ensures that current is distributed more uniformly across all paths. This segmentation prevents current concentration in specific regions, thereby reducing hot spots and temperature imbalance while maintaining overall structural simplicity

Inventive Principle:
Principle #1Segmentation

3Productivity

If high-frequency operation is implemented, then power conversion efficiency improves, but parasitic inductance effects are exacerbated causing phase delay and signal distortion

Engineering Contradiction:
Improvepower conversion efficiencyVSAvoidsignal stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent converts the harmful parasitic inductance effect into a beneficial outcome by utilizing the staggered interleaving structure to create opposing magnetic fields. The adjacent current paths in different layers generate magnetic fields that counteract each other, transforming what would normally be additive parasitic inductance into a cancellation mechanism. This converts the harmful inductive effect into a benefit that reduces overall parasitic inductance, enabling high-frequency operation with improved signal stability and reduced phase delay

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively minimizes parasitic inductance to under 5 nH, enhances current distribution uniformity, and reduces time lag in high-frequency signal transmission, improving the stability and efficiency of power modules.

Implementation Method 1

According to the Ampere's Law, in an AC circuit, a time-varying magnetic field is created when electric current travels through a wire or a power component, while according to Faraday's Law and Lenz's Law, the time-varying magnetic field in turn creates a counterforce opposing the induced electromotive force, which influences the current signal. This effect, due to its analogousness to inductance, is usually referred to as 'parasitic inductance' or 'stray inductance'

Methodology Applied
Scientific EffectParasitic inductance: Electromagnetic Induction

Implementation Method 2

the staggered serial-connection conductors, the staggered input conductive members, and the staggered output conductive members create individual inductances which are mutually cancelled when current flows therethrough, reducing overall parasitic inductance

Methodology Applied
Scientific EffectMagnetic field cancellation: Electromagnetic Induction

Data Source

PatentUS12614988B2Low parasitic inductance power module featuring staggered, interleaving conductive members
Publication Date: 2026.04.28 SENTEC E&E CO LTD
  • US12614988B2 patent drawing
  • US12614988B2 patent drawing
  • US12614988B2 patent drawing

AI summary

A low parasitic inductance power module featuring staggered, interleaving conductive members, including: at least one base extending in a length direction, at least one input bus-bar and at least one output bus-bar being disposed on the base; a first unit including a first circuit base portion disposed on the base along the width direction, a plurality of first power devices being disposed on the first circuit base portion, each of the first power devices having paralleled first current input ends and paralleled first current output ends; the first current input ends or the current output ends being conductively connected to the first circuit base portion; and a second unit. The units are serially connected to the bus-bars via staggered, interleaving input conductive members and output conductive members whereby individual inductances generated are mutually counteracted, thus reducing the overall parasitic inductance.