Interlock Monitoring Circuit for Precise Fault Voltage Detection
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Solution Overview
Problem
Current interlock systems for vehicle electrical networks have limited precision in detecting faults, such as short circuits and 'stuck at' faults, due to noise interference and lack of accurate voltage profile analysis.
Innovation Solution
A monitoring circuit with a signal evaluation device that compares the voltage profile on the second monitoring line to predetermined tolerance intervals around the first and second monitoring voltages, allowing for more precise fault detection and differentiation between fault-free and faulty states, including short circuits and 'stuck at' faults, by using non-overlapping tolerance intervals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If pulse width-modulated signal with two monitoring voltages is used, then noise signals can be distinguished from the monitoring signal, but fault detection precision remains limited
Solution Approach 1:
The patent applies parameter changes by comparing the voltage profile against two distinct tolerance intervals corresponding to different monitoring voltages. This allows the system to detect deviations from expected voltage levels and identify faults with higher precision, resolving the contradiction between noise rejection and fault detection accuracy.
2Measurement precision
If tolerance intervals are defined around monitoring voltages, then fault-free operation can be distinguished from faulty states, but circuit complexity increases
Solution Approach 1:
The patent segments the voltage profile evaluation into two distinct tolerance intervals, each corresponding to a different monitoring voltage level. This segmentation allows for precise fault detection by comparing the voltage profile against appropriate thresholds, achieving high measurement precision without requiring overly complex circuitry.
3Reliability
If voltage profile comparison with tolerance intervals is implemented, then short circuits and stuck at faults can be detected, but response time increases
Solution Approach 1:
The patent implements preliminary action by pre-defining tolerance intervals around each monitoring voltage before actual fault detection occurs. This allows the signal evaluation device to immediately compare the voltage profile against established thresholds, enabling rapid fault detection without requiring complex real-time calculations, thus maintaining both high reliability and fast response time.
Data Source
AI summary
A monitoring circuit (2) for an interlock system (1), said interlock system comprising a first monitoring line (3), a second monitoring line (4), and at least one line bridge (5), by means of which the monitoring lines (3, 4) are electrically conductively connected in a closed state of the interlock system (1), said monitoring circuit comprising a signal generation device (11) which is configured for generating a monitoring signal for the first monitoring line (3) which alternates between a first monitoring voltage and a second monitoring voltage and which is referenced to a reference potential, and a signal evaluation device (17) by means of which a voltage profile (43, 48 to 51) which is referenced to the reference potential is detectable on the second monitoring line (4), wherein the signal evaluation device (17) is configured for determining a fault on one of the monitoring lines (3, 4) which is caused by a fault voltage referenced to the reference potential, and/or a fault in the monitoring circuit (2) by means of a comparison of the voltage profile (43, 48 to 51) with a predetermined first tolerance interval (46) around the first monitoring voltage, and with a predetermined second tolerance interval (47) around the second monitoring voltage.