Interlocking Pillar Geometry for High Density Capacitor Arrays
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Solution Overview
Problem
Thin-film capacitors in implantable medical devices face challenges in maximizing capacitance per unit area due to limited substrate space, as conventional pillar geometries like circles and triangles do not efficiently utilize available surface area.
Innovation Solution
The development of a thin-film capacitor structure featuring pillars with a perimeter that includes multiple protrusions and recessed regions, forming a fractal-like pattern, which increases the perimeter length and thus capacitance per unit area by interlocking protrusions and additional geometry, enhancing the capacitance associated with each pillar.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional pillar geometries (circles, triangles, squares) are used, then the structure is simple to manufacture, but the capacitance per unit area is low due to limited surface area utilization
Solution Approach 1:
The pillar structure is segmented into multiple protrusions and recessed regions along its perimeter, transforming a simple geometric shape into a complex multi-component structure. This segmentation increases the total perimeter length and surface area of each pillar, thereby increasing capacitance per unit area while maintaining manufacturability through standard semiconductor fabrication processes
Solution Approach 2:
The protrusions and recessed regions are arranged in a nested, interlocking pattern where protrusions from one pillar fit into recessed regions of adjacent pillars. This nested arrangement maximizes the use of available substrate space and increases the effective surface area without requiring additional substrate area, thus improving capacitance density
2Quantity of substance
If the substrate area is increased to accommodate more capacitor surface area, then the capacitance per unit area increases, but the device size increases which is problematic for implantable medical devices
Solution Approach 1:
Instead of uniformly increasing substrate area, the invention concentrates capacitance enhancement at the local level by modifying the pillar geometry itself. The protrusions and recessed regions create localized increases in surface area and perimeter length, maximizing capacitance generation within the existing substrate footprint rather than expanding the substrate area
Solution Approach 2:
The invention transitions from considering only the top-down two-dimensional footprint of pillars to utilizing the third dimension by creating vertical protrusions and recessed regions. This dimensional transformation increases the effective surface area and perimeter length without increasing the planar substrate area, thereby increasing total capacitance within the same device footprint
3Quantity of substance
If the pillar perimeter is increased to increase capacitance, then the capacitance per unit area increases, but the pillar geometry becomes more complex
Solution Approach 1:
The pillar geometry employs asymmetric protrusions and recessed regions that are strategically positioned to maximize perimeter length and surface area. The asymmetric design allows for optimized capacitance generation while maintaining manufacturability, as the asymmetric features can be created using standard photolithography and etching processes without requiring complex alignment or multiple fabrication steps
Data Source
AI summary
A thin-film device system includes a substrate and a plurality of pillars. The plurality of pillars project from a surface of the substrate. Each of the plurality of pillars have a perimeter that includes at least four protrusions that define at least four recessed regions between the at least four protrusions. Each of the at least four recessed regions of each of the plurality of pillars receives one protrusion from an adjacent one of the plurality of pillars. A thin-film device is fabricated over the plurality of pillars.