Interlocking Inverter Storage Cell for Soft Error Recovery
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Solution Overview
Problem
Current integrated circuits are prone to soft errors caused by alpha particles and neutrons, leading to data corruption, especially in sequential elements like latches and flip-flops, which can result in improper operation, and existing soft error protection techniques introduce additional latency that high-performance circuits cannot tolerate.
Innovation Solution
A storage element with an interlocking four-inverter loop and feedback circuitry that prevents soft error-induced changes from propagating, allowing recovery from alpha particle and neutron hits without affecting latency, employing PMOS and NMOS transistors with gating elements to maintain the original logic state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If device geometries are shrunk and supply voltages are decreased for performance reasons, then speed and power efficiency are improved, but critical charge value becomes too low making the circuit more prone to soft errors
Solution Approach 1:
The storage element is segmented into multiple storage nodes (first storage node and second storage node) with cross-coupled inverters. This segmentation allows the circuit to distribute and protect data across multiple nodes, enabling soft error recovery when one node is affected by an alpha particle hit.
Solution Approach 2:
The patent implements feedback circuitry where the output of one inverter feeds back to the input of another inverter in a cross-coupled configuration. This feedback mechanism enables the storage element to detect and correct soft errors by restoring the original logic state through the feedback path when a soft error occurs at one storage node.
2Device complexity
If a conventional back-to-back inverter storage element is used, then device complexity is low, but the critical charge value is too low making it susceptible to soft errors from alpha particles
Solution Approach 1:
The patent employs redundant storage nodes and cross-coupled feedback circuitry that are prepared in advance to cushion against soft errors. When an alpha particle hits one storage node, the redundant node and feedback mechanism are already in place to prevent data loss and enable recovery, providing beforehand protection against the harmful effect.
3Reliability
If error correcting codes are implemented in memory modules, then soft error protection is improved, but additional latency is introduced
Solution Approach 1:
The storage element performs soft error detection and correction autonomously through its internal cross-coupled feedback mechanism. When a soft error occurs, the feedback circuitry automatically detects the error condition and restores the correct logic state without requiring external error correction codes or additional processing cycles, thus avoiding the latency associated with traditional ECC methods.
Data Source
AI summary
A soft error recoverable storage element suitable for use in latches, flip-flops, static ram memory cells and microprocessor pipeline stages. The storage element employs a redundant copy of the stored data value and a feedback loop. One embodiment employs an interlocking four inverter loop with gating devices that blocks the propagation of a soft error induced change of state and causes the storage element to recover its original stored data state.


