Intermediary Storage Path for Fast Multi-Processor Control Signals

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Solution Overview

Problem

In multi-processor systems, rapid signal transmission is hindered when signals are transmitted from external devices to control target devices via multiple devices, particularly when one CPU is using a shared memory.

Innovation Solution

A signal processing system with a first device and a second device connected via internal communication paths, including processors and storage media, allowing for master-slave communication to facilitate rapid signal transmission to control target devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a shared memory is used for communication between CPUs in different devices, then data can be transmitted between processors, but the signal transmission speed becomes slow when one CPU is using the shared memory

Engineering Contradiction:
Improvedata transmission capabilityVSAvoidsignal transmission speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent divides the communication path into two segments: a first internal communication path within the first device and a second internal communication path within the second device. This segmentation allows the control signal to bypass the shared memory and external device interfaces, enabling rapid transmission through dedicated internal paths while maintaining data transmission capability between different devices.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a storage medium as an intermediary component that is accessible by both the first and second processors through their respective internal communication paths. This intermediary storage medium enables direct data exchange between processors without requiring shared memory, thus achieving fast signal transmission while preserving inter-device communication reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If signals are transmitted via multiple devices and shared memory, then communication between external devices and control target devices is enabled, but the transmission time increases

Engineering Contradiction:
Improvecommunication capabilityVSAvoidsignal transmission time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent establishes preliminary communication paths (first and second internal communication paths) between the first processor and storage medium, and between the storage medium and second processor. These pre-configured paths enable immediate signal transmission without requiring signal routing through multiple external devices, thus reducing transmission time while maintaining versatile communication capability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates a new dimensional communication path by introducing an internal communication pathway that bypasses the traditional external device interface route. This dimensional change in signal transmission architecture allows simultaneous access to multiple devices through the storage medium without sequential delays, reducing time loss while preserving adaptability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20260023356A1Signal processing system, control target device, and signal processing method
Publication Date: 2026.01.22 SHARP NEC DISPLAY SOLUTIONS LTD
  • US20260023356A1 patent drawing
  • US20260023356A1 patent drawing
  • US20260023356A1 patent drawing

AI summary

A signal processing system includes: a first device to receive a control signal from an external device; a second device connected to the first device and to control a control target device; and a first storage medium connected to the first and second devices. The first device includes a first processor to output the control signal to the second device and a second storage medium connected to the first processor via a first internal communication path. The second device includes a second processor to control the control target device based on the control signal and a third storage medium connected to the second processor via a second internal communication path. The first storage medium is connected to the first and second internal communication pathes. The first storage medium stores the control signal input via the first internal communication path, and outputs the control signal via the second internal communication path.