Intermediate Metal Layer Cell Structure for Higher IC Routing Capacity
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Solution Overview
Problem
The semiconductor industry faces challenges in reducing chip area and lowering costs while maintaining power conversion efficiency, as smaller cell heights in integrated circuits (ICs) lead to scarce metal layer routing resources due to the need for fewer metal tracks in the back-end-of-line (BEOL) process.
Innovation Solution
The proposed solution involves utilizing intermediate gate connection metal layers instead of the first metal (M1) layer for connecting power supply terminals, allowing for more M1 layer tracks to be used for routing by eliminating the need for direct connections to power supply terminals, thereby optimizing routing resources in the BEOL.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the first metal (M1) layer is used for connecting power supply terminals, then power supply connections are established, but routing resources are reduced and functional density decreases
Solution Approach 1:
The patent introduces intermediate metal layers (IM1, IM2) between the M1 layer and power supply terminals, adding a new dimensional level to the metal layer structure. This allows M1 to be dedicated to routing while intermediate layers handle power connections, effectively increasing routing capacity without adding overall complexity to the interconnect system.
Solution Approach 2:
The intermediate metal layers serve as mediator structures that decouple the direct connection between M1 and power supply terminals. By introducing these intermediate layers, the patent enables M1 to focus on signal routing while the intermediate layers manage power distribution, thereby optimizing routing resources and enhancing functional density.
2Area of moving object
If cell height is reduced to decrease chip area, then chip area and cost are reduced, but metal layer routing resources become scarce
Solution Approach 1:
By introducing intermediate metal layers at different vertical levels within the cell structure, the patent effectively utilizes the vertical dimension to create additional routing resources. This allows more routing tracks to be accommodated within the same cell height, thereby maintaining routing capacity while reducing chip area.
Solution Approach 2:
The patent implements a nested metal layer structure where intermediate metal layers (IM1, IM2) are positioned between M1 and the power supply terminals. This nesting arrangement allows multiple routing layers to be stacked vertically, increasing routing density without increasing the horizontal chip area.
3Reliability
If more metal tracks are allocated to power supply connections, then power distribution is improved, but routing capacity for signals decreases
Solution Approach 1:
The patent segments the metal layer functions by separating power supply connections from signal routing. M1 is dedicated to routing, while intermediate layers (IM1, IM2) are assigned to power connections. This segmentation allows each layer to be optimized for its specific function, improving both power distribution and signal routing capacity simultaneously.
Solution Approach 2:
The intermediate metal layers act as intermediary structures that handle power distribution without interfering with signal routing on M1. This separation of concerns ensures reliable power delivery while maintaining high routing capacity for signals, resolving the trade-off between power distribution and routing capacity.
Data Source
AI summary
A cell on an integrated circuit is provided. The cell includes: a fin structure; an intermediate fin structure connection metal track disposed in an intermediate fin structure connection metal layer above the fin structure, the intermediate fin structure connection metal track being connected to the fin structure; and a first intermediate gate connection metal track disposed in an intermediate gate connection metal layer above the intermediate fin structure connection metal layer, the first intermediate gate connection metal track being connected to the intermediate fin structure connection metal track. A first power supply terminal is connected to the first intermediate gate connection metal track.