Semiconductor device having high yield strength intermediate plate
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Solution Overview
Problem
The yield strength relationship between aluminum electrode substrates and solder in semiconductor devices is reversed within operating temperature ranges, leading to deformation and reliability issues during cooling/heating and power cycles, especially for high-temperature SiC chips.
Innovation Solution
Incorporating an intermediate plate with higher yield strength than the electrode substrate and solder between the semiconductor chip and the electrode substrate, which helps maintain the semiconductor chip's position and suppress deformation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an aluminum electrode substrate and solder are used for bonding the semiconductor chip, then the device structure is simple and manufacturing is easy, but the yield strength relationship reverses within the operating temperature range causing deformation and reliability deterioration
Solution Approach 1:
An intermediate plate is introduced between the aluminum electrode substrate and the semiconductor chip. This intermediate plate acts as a mediator that maintains stable yield strength across the operating temperature range, preventing the yield strength reversal issue between aluminum and solder. The intermediate plate has yield strength characteristics that remain higher than both the aluminum substrate and solder throughout the temperature range, thereby suppressing deformation.
Solution Approach 2:
The bonding structure is transformed from a simple aluminum-substrate-and-solder composite to a three-layer composite including the intermediate plate. This composite structure combines materials with complementary properties: the aluminum substrate provides electrical conductivity and thermal conductivity, the intermediate plate provides stable mechanical strength across temperature ranges, and the solder provides bonding functionality. This multi-material composite resolves the yield strength reversal problem.
2Stability of the object's composition
If the upper surface of the semiconductor chip is covered with molding resin to suppress deformation, then deformation is suppressed, but this approach cannot be applied when solder bonding on the upper surface is performed
Solution Approach 1:
The solution segments the bonding structure into distinct functional layers: the intermediate plate is positioned specifically in the first solder layer between the aluminum substrate and the semiconductor chip, while leaving the upper surface of the semiconductor chip accessible for lead frame bonding. This segmentation allows deformation suppression without compromising upper surface functionality.
Solution Approach 2:
The intermediate plate serves as a mediator that provides mechanical stability and deformation suppression from the lower side of the semiconductor chip, eliminating the need to cover the upper surface with molding resin. This approach maintains adaptability for upper surface solder bonding while achieving the deformation suppression effect.
3Temperature
If a wide operating temperature range is used for high-temperature SiC chips, then high-temperature performance is achieved, but large temperature stress causes increased deformation
Solution Approach 1:
The yield strength parameter of the intermediate plate is specifically selected and controlled to maintain a value higher than both the aluminum substrate and solder across the entire operating temperature range. This parameter selection ensures that the intermediate plate consistently bears the mechanical load and prevents deformation, even when large temperature stresses occur during wide temperature range operation.
Data Source
AI summary
A semiconductor chip (3) is bonded to an upper surface of an electrode substrate (1) via a first solder (2). A lead frame (5) is bonded to an upper surface of the semiconductor chip (3) via a second solder (4). An intermediate plate (6) is provided in the first solder (2) between the electrode substrate (1) and the semiconductor chip (3). A yield strength of the intermediate plate (6) is higher than yield strengths of the electrode substrate (1) and the first solder (2) within the whole operating temperature range of the semiconductor device.