Intermodal Calling Branch Instruction for Exception Deprivileging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In systems with handler and thread modes, deprivileging exceptions to prevent untrusted exception handlers from accessing all registers or memory is challenging, especially in real-time applications, as existing mechanisms are slow and complex, often requiring fake exceptions and additional state saving, which increases interrupt/exception handling latency.
Innovation Solution
An intermodal calling branch instruction is introduced, allowing direct switching from handler mode to thread mode by saving a function return address and branching to a target address, eliminating the need for fake exceptions and reducing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing mechanisms for deprivileging exceptions are used, then security is maintained, but interrupt/exception handling latency increases due to slow and complex mechanisms requiring fake exceptions and additional state saving
Solution Approach 1:
The patent extracts the mode switching functionality from the complex exception handling mechanism by introducing a dedicated intermodal calling branch instruction. This instruction directly switches from handler mode to thread mode without requiring fake exceptions or additional state saving operations, thereby reducing exception handling latency while maintaining security through hardware-enforced mode separation
Solution Approach 2:
The patent performs preliminary action by automatically saving the function return address to a function return address storage location as part of the mode switching process. This preliminary saving action eliminates the need for subsequent state restoration operations that would otherwise be required when returning from fake exceptions, thereby reducing overall exception handling latency
2Reliability
If existing mechanisms for deprivileving exceptions are used, then security is maintained, but device complexity increases due to requirements for fake exceptions and additional state saving
Solution Approach 1:
The patent extracts the mode switching functionality from the complex exception handling mechanism by introducing a dedicated intermodal calling branch instruction. This instruction directly switches from handler mode to thread mode without requiring fake exceptions or additional state saving operations, thereby reducing exception handling latency while maintaining security through hardware-enforced mode separation
Solution Approach 2:
The intermodal calling branch instruction serves multiple functions: it switches modes, saves the return address, and branches to the target instruction in a single unified operation. This multi-functionality eliminates the need for separate fake exception mechanisms and state saving operations, thereby reducing device complexity while maintaining security
Data Source
AI summary
Processing circuitry has a handler mode and a thread mode. In response to an exception condition, a switch to handler mode is made. In response to an intermodal calling branch instruction specifying a branch target address when the processing circuitry is in the handler mode, an instruction decoder controls the processing circuitry to save a function return address to a function return address storage location; switch a current mode of the processing circuitry to the thread mode; and branch to an instruction identified by the branch target address. This can be useful for deprivileging of exceptions.