Memory Device Partial Writes Using Internal Bit Operations
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Solution Overview
Problem
Existing memory systems face performance degradation due to the high number of partial write operations, which are inefficient when the memory device lacks a data mask pin, leading to increased latency and power consumption.
Innovation Solution
A memory system and device that perform partial write operations internally through bit operations using reset and set write commands and data, generating seed and write data without external data transmission, utilizing flag signals and bit calculation circuits to update specific bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the memory device performs partial write operations using read-modify-write commands, then the memory device can update specific data without external intervention, but the latency and power consumption increase due to multiple operations
Solution Approach 1:
The memory device performs preliminary actions by internally reading the target data, generating seed data through bit operations, and preparing the modified data before the controller completes the write command. This allows the memory device to have the data ready for immediate writing, reducing the overall operation latency.
Solution Approach 2:
The memory device serves itself by internally performing the read-modify-write operations without requiring the controller to intervene. The device autonomously reads its own data, performs bit operations to generate modified data, and writes it back, eliminating the need for external data transfer and reducing both latency and power consumption.
2Ease of operation
If the memory device performs partial write operations by transmitting data externally, then the operations can be completed, but the power consumption increases due to data transmission
Solution Approach 1:
The invention extracts only the necessary write data from the memory device and transmits it to the controller, while the read data and intermediate seed data remain internal to the memory device. This selective extraction minimizes the amount of data transmitted externally, thereby reducing power consumption associated with data transmission.
Solution Approach 2:
The memory device performs the computationally intensive bit operations and data generation internally without requiring external processing. By self-generating the modified data through internal bit operations, the device avoids the power consumption associated with transmitting large amounts of data back and forth between the controller and memory device.
3Productivity
If the memory device supports data mask pins, then partial write operations can be efficiently performed, but the device complexity increases
Solution Approach 1:
The invention changes the operational parameters by introducing specific command types (load command, store command) and associated flag signals that enable the memory device to differentiate between read and write phases. This parameter-based control mechanism achieves partial write functionality without requiring additional physical mask pins, thereby maintaining device simplicity while improving productivity.
Solution Approach 2:
The memory device achieves multi-functionality by using existing command and flag signal mechanisms to perform both traditional read/write operations and partial write operations. The flag signals serve multiple purposes by indicating different operational modes (load, store, bit operation types) without requiring separate dedicated pins or circuits, thus avoiding increased device complexity.
Data Source
AI summary
A memory system includes a controller configured to transmit a reset write command and reset write data, and transmit a set write command and set write data; and at least one memory device configured to generate seed data by performing a first operation on the reset write data and read data read out from a target memory area in response to the reset write command, generate write data by performing a second operation on the seed data and the set write data in response to the set write command, and write back the write data to the target memory area.