Internal Command Control Circuit for Test Speed Mismatch
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Solution Overview
Problem
Semiconductor devices face challenges in generating internal commands effectively due to differences in operating speeds with test devices, leading to improper reception of external commands during testing.
Innovation Solution
The semiconductor device incorporates a skip exit control circuit, mode control circuit, and command control circuit to generate internal commands by setting skip signals, mode signals, and command pulses in response to test mode signals, ensuring synchronized operation across different modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the semiconductor device operates at a different speed than the test device, then the semiconductor device can perform internal operations, but it cannot properly receive external commands from the test device
Solution Approach 1:
The semiconductor device generates its own test commands internally through the command control circuit and mode control circuit, eliminating the need to receive commands from the external test device. The device autonomously performs self-testing by generating internal commands based on mode signals and skip exit signals, thus solving the speed mismatch problem while maintaining reliable testing.
Solution Approach 2:
The patent introduces internal command generation circuits as intermediaries between the test device and the semiconductor device's internal operations. The command control circuit receives mode signals from the mode control circuit and generates appropriate internal commands, acting as a mediator that translates external test intentions into internally compatible commands, thus resolving the speed compatibility issue.
2Reliability
If the semiconductor device generates internal commands for testing, then it can perform self-testing despite speed differences, but the complexity of the control circuits increases
Solution Approach 1:
The command control circuit and mode control circuit are designed to perform multiple functions: they control normal operations, generate internal test commands, and respond to mode signals from external devices. By making these circuits multi-functional, the patent reduces the need for separate dedicated test circuits, thereby managing complexity while achieving reliable self-testing capability.
Solution Approach 2:
The control circuits dynamically adjust their behavior based on mode signals and skip exit signals. The command control circuit generates different internal commands based on the current mode state, and the mode control circuit transitions between operational modes based on test requirements. This dynamic adaptability allows the same circuits to handle both normal operation and self-testing, managing complexity through flexible control rather than separate hardwired paths.
3Adaptability or versatility
If the semiconductor device uses multiple skip signals for mode control, then it can switch between different operation modes, but the control logic becomes more complex
Solution Approach 1:
The control logic is segmented into distinct functional blocks: the skip exit control circuit that generates skip exit signals based on mode signals, the mode control circuit that manages operational modes, and the command control circuit that generates specific commands. This segmentation allows each block to handle a specific aspect of mode switching, making the overall complex control logic more manageable and easier to implement while maintaining versatile mode switching capability.
Data Source
AI summary
A semiconductor device includes a skip exit control circuit configured to select one of a plurality of skip signals as a selection skip signal, responsive to a test mode signal, and generate a skip exit signal, responsive to the selection skip signal, a mode control circuit configured to generate a mode signal to change the mode responsive to the skip exit signal until entering a preset final mode, and a command control circuit configured to generate internal commands for each mode, responsive to the mode signal.


