Internal Memory Bandwidth Control for Capacity–Speed Tradeoffs
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Solution Overview
Problem
The increasing gap between processor computing speed and internal memory access speed and capacity, known as the 'internal memory wall', is exacerbated by the trade-off between memory capacity and access speed, necessitating a solution to ensure high access speed while increasing memory capacity.
Innovation Solution
A hybrid internal memory system with multiple types of memory media, such as DRAM and SCM, dynamically adjusts bandwidth allocation based on occupancy rates and application requirements, using policies to optimize bandwidth distribution among different memory types.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a larger storage capacity storage medium is used to increase internal memory capacity, then the storage capacity is improved, but the access speed and latency deteriorate
Solution Approach 1:
The patent segments the internal memory system into multiple types of memory media (e.g., high-speed memory and storage-class memory) with different capacities and access speeds. Each memory type is allocated to different applications based on their bandwidth requirements, allowing the system to simultaneously provide high capacity for less time-sensitive data and high speed for time-sensitive data, thereby resolving the contradiction between capacity and access speed.
Solution Approach 2:
The patent applies local quality by assigning different memory media with distinct characteristics to different applications or data types based on their specific requirements. High-speed memory is allocated to applications requiring fast access, while storage-class memory is allocated to applications with lower speed requirements but higher capacity needs, optimizing the overall system performance by matching memory properties to local application needs.
2Quantity of substance
If multiple types of storage media are disposed to increase internal memory capacity, then the storage capacity is improved, but the overall access speed deteriorates
Solution Approach 1:
The patent implements dynamic bandwidth allocation mechanisms that adjust the bandwidth assigned to different memory media based on real-time occupancy rates and application requirements. This dynamic adjustment ensures that the high-speed memory resources are available when needed, preventing the overall access speed from deteriorating even as memory capacity is expanded with slower storage-class memory.
Solution Approach 2:
The patent employs feedback mechanisms where the system monitors the occupancy rate of internal memory bandwidth and uses this information to dynamically adjust bandwidth allocation. When the occupancy rate indicates potential bandwidth contention, the system reallocates bandwidth to maintain overall access speed, thereby resolving the contradiction between increased capacity and maintained productivity.
Data Source
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AI summary
A method for controlling an internal memory bandwidth is provided. After obtaining a bandwidth required by a to-be-accessed internal memory medium, any processor (for example, a first processor) in a system obtains an occupancy rate of an internal memory bandwidth of the to-be-accessed internal memory medium. If determining, based on the occupancy rate of the internal memory bandwidth, that the to-be-accessed internal memory medium cannot satisfy a bandwidth requirement, the processor adjusts, under an indication of a bandwidth adjustment policy, the occupancy rate of the internal memory bandwidth based on a factor that affects the occupancy rate of the internal memory bandwidth of the to-be-accessed internal memory medium, and uses a first bandwidth that satisfies the bandwidth requirement in an adjusted remaining bandwidth of the to-be-accessed internal memory medium In this way, a remaining bandwidth of an internal memory medium is dynamically adjusted, so that the to-be-accessed internal memory medium can provide an application run by the processor with a sufficient bandwidth for use, to ensure an overall access speed of accessing an internal memory by the processor.