Internal Processor Interface for Local NVM Data Block Access
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory systems face limitations in data processing performance due to the need for host devices to frequently access non-volatile memory through external interfaces, which can hinder efficient data processing and increase energy consumption.
Innovation Solution
Implementing an internal processor-to-processor interface within a computational storage device that allows for local data processing and management within the memory device, utilizing a first and second processor to facilitate direct access and transfer of data blocks between volatile and non-volatile memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If host device accesses non-volatile memory through external interface, then data storage function is achieved, but data processing performance is limited
Solution Approach 1:
The patent merges the computational storage subsystem with the memory device by integrating a processor and volatile memory directly into the memory device. This allows the computational storage subsystem to independently process data without requiring frequent host device intervention, thereby improving data processing performance while maintaining a manageable architecture through functional integration
2Productivity
If host device frequently accesses non-volatile memory, then data processing is enabled, but energy consumption increases
Solution Approach 1:
The computational storage subsystem is designed to serve itself by including an embedded processor and volatile memory that can independently execute data processing tasks. This self-contained architecture eliminates the need for continuous host device involvement, reducing energy consumption while maintaining data processing capability through autonomous operation
3Ease of operation
If internal processor-to-processor interface is implemented, then local data processing is enabled, but device complexity increases
Solution Approach 1:
The patent segments the memory device into distinct functional subsystems: a memory controller subsystem for managing non-volatile memory access and a computational storage subsystem for data processing. This segmentation allows each subsystem to operate independently with well-defined interfaces, making the overall system easier to manage and operationally autonomous while maintaining modular complexity
Data Source
AI summary
This application is directed to processing data between a computational storage processor and a non-volatile memory via an internal interface within a memory device. The memory device has a chip, including a first processor and a second processor, and a non-volatile memory storing a first data block set. A method for processing data includes generating a first request for the first data block set by the second processor. The method also includes sending the first request from the second processor to the first processor. The method further includes in response to the first request, extracting the first data block set from the non-volatile memory by the first processor. The method further includes providing, by the first processor, the first data block set to the second processor.