Internal Test Engine for IC Chip Concurrent Testing

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Integrated circuit (IC) chips, especially those in multi-chip modules (MCM) or system-in-a-package (SiP), face challenges in testing components after packaging due to inaccessible signal paths and limited test capabilities within the System on Chip (SOC), making it difficult to apply comprehensive tests to all components, including memory dies.

Innovation Solution

An internal test engine within the SOC, configured to test the die and download test patterns from external devices, works concurrently with an external test engine to assess and repair components, allowing for thorough testing and repair of IC chips, including memory dies, by transmitting results to the CPU and external controllers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an external test engine is used to test components after packaging, then testing coverage can be achieved, but signal accessibility and test capability are limited due to inaccessible signal paths

Engineering Contradiction:

Improvetesting coverageVSAvoidsignal accessibility

Core Design Contradiction:

ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

An internal test engine is introduced as an intermediary component within the SOC to bridge the gap between external test equipment and internal die components. The internal test engine receives test patterns from external sources, processes them internally, and applies them to the die, enabling testing of signals that would otherwise be inaccessible through external I/O pins alone.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The testing system is divided into two functional segments: an external test engine for high-level control and pattern generation, and an internal test engine for actual signal application and response collection. This segmentation allows each component to specialize in specific testing tasks, overcoming the limitations of using only one testing approach.

Inventive Principle:

Principle #1Segmentation

2Reliability

If comprehensive testing is performed on all components including memory dies, then testing thoroughness is improved, but testing time increases significantly

Engineering Contradiction:

Improvetesting thoroughnessVSAvoidtesting time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The internal test engine is pre-configured with test patterns and capabilities before actual testing begins. Test patterns are loaded into the internal test engine in advance, and the engine is prepared to execute multiple test sequences without requiring external intervention for each individual test operation, thereby reducing overall testing time.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The internal test engine enables continuous testing operations by maintaining test pattern generation and application internally without interruption. The engine can cycle through test patterns, collect responses, and prepare subsequent tests without waiting for external equipment reconfiguration, ensuring continuous useful testing action throughout the process.

Inventive Principle:

Principle #20Continuity of useful action

Data Source

PatentUS8330477B1Test engine for integrated circuit chip testing

Publication Date: 2012.12.11 MARVELL ASIA PTE LTD

AI summary

Some of the embodiments of the present disclosure provide an integrated circuit (IC) chip comprising a die, a system on chip (SOC) coupled to the die, and an internal test engine included in the SOC and configured to test the die, wherein one or more components within the IC chip may be configured to be tested by an external test engine coupled to the IC chip. Other embodiments are also described and claimed.