Internal Voltage Generator Circuit for Semiconductor Memory
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Solution Overview
Problem
Semiconductor memory devices face performance degradation due to rapid drops in internal array voltage (VINTA) during bit line charging, leading to voltage deviations from reference levels, which affect data sensing and storage efficiency.
Innovation Solution
An internal voltage generator circuit that includes a comparator, internal voltage driver, voltage divider circuit with adjustable resistor units, and control signal generator to maintain stable internal array voltage by dynamically adjusting the resistance ratio between the resistor units based on comparison signals and precharge commands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a large amount of current is consumed to charge bit lines rapidly, then the bit line charging speed is improved, but the internal array voltage drops rapidly
Solution Approach 1:
The voltage divider circuit dynamically adjusts its division ratio by switching between different resistor units (first through fourth resistor units) based on operational phases. During bit line charging, a first division ratio is applied, and after charging completes, a second division ratio is applied to maintain voltage stability, making the voltage regulation adaptive to different operational states
Solution Approach 2:
The invention changes the resistance parameters of the voltage divider circuit by selecting different resistor units with different resistance values. This parameter change allows the circuit to optimize voltage division for different operational conditions - enabling rapid charging when needed while maintaining stable voltage afterward
2Productivity
If the internal array voltage is allowed to drop rapidly during bit line charging, then the bit line can be charged quickly, but the voltage deviates from the reference voltage
Solution Approach 1:
The voltage divider circuit transitions from a static design to a dynamic one by switching between different resistor configurations. This dynamic adjustment enables the circuit to tolerate larger voltage drops during charging (when speed is priority) while maintaining precise voltage levels during subsequent operations (when precision is priority)
Solution Approach 2:
The invention applies different voltage division ratios in periodic phases: first during the bit line charging phase (allowing voltage drop for speed), then after charging completes (maintaining precision). This periodic switching of operational modes resolves the contradiction between speed and precision requirements
Data Source
AI summary
An internal voltage generator circuit is disclosed. The internal voltage generator circuit includes a comparator configured to compare a first voltage with a reference voltage and to output a comparison signal. The circuit further includes an internal voltage driver configured to receive an external voltage and the comparison signal and to output an internal voltage at an internal voltage output terminal, based on the comparison signal. The circuit further includes a voltage divider circuit including first and second resistor units and a first voltage output terminal between the first and second resistor units, configured to receive the internal voltage, and configured to output the first voltage based on the resistance values of the first and second resistor units, the first and second resistor units connected in series, and the first voltage being output through the first voltage output terminal. The circuit further includes a control signal generator circuit configured to generate at least one resistor control signal for controlling the resistance value of the first resistor unit and at least one resistor control signal for controlling the resistance value of the second resistor unit, on the basis of the comparison signal and a precharge command.