Internal Voltage Generator With Shared Pumping Circuitry
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Solution Overview
Problem
Semiconductor memory devices require multiple internal voltage generators for various voltage levels, leading to increased design complexity and chip size due to the need for separate units for each voltage type, such as substrate bias and negative low voltages.
Innovation Solution
An internal voltage generator with shared circuitry, including voltage level detection units, a common internal voltage generation unit, and a path multiplexing unit that selectively outputs internal voltages to different terminals, allowing for the generation of multiple voltage levels using a single common unit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate internal voltage generation units are used for each voltage type (substrate bias voltage and negative low voltage), then each voltage can be generated independently with stable operation, but the circuit configuration becomes complex and chip size increases
Solution Approach 1:
The patent merges separate internal voltage generation units into a single integrated unit that can generate both substrate bias voltage and negative low voltage. The combining unit includes a pumping section with control logic that responds to detection signals from voltage level detection units, allowing one unit to perform functions previously requiring multiple separate units, thereby simplifying circuit configuration while maintaining stable operation
Solution Approach 2:
The internal voltage generation unit is designed with multi-functionality to generate different types of internal voltages (substrate bias voltage and negative low voltage) using the same pumping section. The control logic selectively activates appropriate pumping circuits based on detection signals, enabling a single unit to serve multiple voltage generation purposes and reduce overall device complexity
2Reliability
If separate internal voltage generation units are used for each voltage type, then each voltage can be generated independently, but the chip size increases
Solution Approach 1:
The patent combines multiple voltage generation functions into a single integrated unit, reducing the total area required on the chip. The shared pumping section and control logic eliminate redundant circuitry that would exist in separate units, thereby reducing chip size while maintaining the capability to generate different voltages independently when needed
Solution Approach 2:
The universal voltage generation unit can perform multiple voltage generation tasks using shared hardware resources. By having one unit that can generate both substrate bias voltage and negative low voltage through selective activation of pumping circuits, the chip area required is significantly reduced compared to having separate dedicated units for each voltage type
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes circuit configuration and chip size by using shared components to generate multiple internal voltages efficiently, reducing power consumption and stabilizing circuit operations.
Implementation Method 1
a pumping section configured to generate the internal voltage through a pumping operation in response to the oscillation signal
Data Source
AI summary
A internal voltage generator includes a plurality of voltage level detection units, each configured to detect a voltage level of a corresponding internal voltage terminal, based on a predetermined target voltage level assigned to the corresponding internal voltage terminal, and generate a detection signal, a common internal voltage generation unit configured to generate an internal voltage through a pumping operation in response to the detection signal outputted from the voltage level detection units, and a path multiplexing unit configured to selectively output the internal voltage to one of the internal voltage terminals.