Interpolation Circuit Hysteresis Compensation
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Solution Overview
Problem
Conventional interpolation circuits for motors suffer from hysteresis issues in comparators, leading to delayed logic value transitions and reduced accuracy in comparison results.
Innovation Solution
The proposed solution involves an interpolation circuit with a phase shift circuit, multiplexers, comparators, state control circuits, and voltage level compensating circuits to generate and manage phase shift signals, ensuring that comparators do not receive identical signals simultaneously, and using state control to switch multiplexer states based on comparing results, with voltage level compensation to address hysteresis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hysteresis is added to the comparator to improve noise immunity, then reliability is improved, but measurement precision deteriorates due to delayed logic value transitions
Solution Approach 1:
The voltage level compensating circuit performs preliminary action by proactively adjusting the voltage levels of comparator inputs before the hysteresis effect can cause inaccurate comparisons. When the multiplexer state is about to change (detected through state control circuit logic), the compensating circuit pre-adjusts the voltage levels to ensure that the comparator outputs transition at the correct moments, thereby maintaining measurement precision while preserving the noise immunity benefits of hysteresis.
Solution Approach 2:
The invention applies parameter changes by dynamically adjusting the voltage level parameters of the comparator inputs based on the multiplexer state. The voltage level compensating circuit modifies the voltage levels of the signals fed to the comparator, changing these parameters in response to state transitions. This ensures that even with hysteresis present, the comparison occurs at the correct voltage threshold, maintaining accuracy while preserving noise rejection.
2Measurement precision
If voltage level compensation is applied to improve comparison accuracy, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The voltage level compensating circuit is designed with multi-functionality to reduce overall device complexity. It serves multiple purposes: compensating for voltage level shifts during multiplexer state changes, maintaining comparison accuracy, and working cooperatively with the existing hysteresis mechanism to preserve noise immunity. By consolidating these functions into a single circuit block that interfaces with existing components, the invention avoids the need for entirely separate compensation circuits, thereby limiting the increase in device complexity.
Solution Approach 2:
The voltage level compensating circuit acts as an intermediary between the multiplexer and the comparator. Rather than requiring complex modifications to either the multiplexer or comparator themselves, the compensating circuit mediates the signal transmission between these two components. This intermediary approach allows voltage level adjustment without fundamentally redesigning the existing comparator or multiplexer architectures, thus limiting the overall device complexity increase while still achieving improved measurement precision.
Data Source
AI summary
An interpolation circuit comprising: a phase shift circuit, configured to generate a plurality of phase shift signals; a first multiplexer configured to receive at least portion of the phase shift signals; a first comparator, comprising a first positive input terminal and a first negative input terminal; a second comparator, comprising a second positive input terminal and a second negative input terminal; a first state control circuit, configured to control the first multiplexer to switch to a different state according to a first comparing result and a second comparing result, wherein the first multiplexer outputs different ones of the phase shift signals in different states; and a first voltage level compensating circuit, configured to pull up or pull down a first output signal from the first output terminal or a second output signal from the second output terminal when the state of the first multiplexer changes.