Interpolation Circuit for Asynchronous Sensor Readout Noise Reduction

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Solution Overview

Problem

Existing physical quantity detection systems face issues with folding noise due to asynchronous sampling and reading request timings, particularly when the MCU acquires data at irregular intervals, making it difficult to comprehend the sampling rate ratio and effectively apply frequency conversion methods.

Innovation Solution

A data processing circuit with an interpolation circuit that performs interpolation processes on digital signals based on earlier input data, outputting interpolated data in response to reading requests, thereby reducing folding noise even when input and reading request timings are asynchronous. This circuit can use methods like cubic interpolation and store calculation coefficients for efficient processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If frequency conversion method is used to reduce folding noise, then output signal quality is improved, but it requires knowing the sampling rate ratio in advance which limits adaptability when MCU acquires data at irregular timing

Engineering Contradiction:

Improveoutput signal qualityVSAvoidadaptability to irregular sampling

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent applies dynamics by making the sampling rate ratio configurable rather than fixed. The system can dynamically adjust the sampling rate ratio according to different operating conditions and timing requirements, allowing it to adapt to both regular and irregular sampling scenarios while maintaining signal quality through appropriate ratio selection.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of sampling rate ratio from a fixed value to a configurable parameter. By allowing the sampling rate ratio to be modified based on timing requirements, the system can optimize signal quality for different operating conditions without being constrained by a predetermined ratio.

Inventive Principle:

Principle #35Parameter changes

2Measurement precision

If interpolation process is performed continuously to handle asynchronous timing, then output accuracy is improved, but power consumption increases

Engineering Contradiction:

Improveoutput data accuracyVSAvoidpower consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies periodic action by performing interpolation processing only at specific intervals or when triggered by timing requirements, rather than continuously. This allows the system to maintain output accuracy when needed while reducing power consumption during periods when interpolation is not required.

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The system uses timing information from the reading request signal to determine when interpolation is necessary, making the processing schedule self-regulating based on actual demand rather than requiring external control signals.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS10291215B2Data processing circuit, physical quantity detection circuit, physical quantity detection device, electronic apparatus, and moving object

Publication Date: 2019.05.14 SEIKO EPSON CORP

AI summary

A data processing circuit includes an interpolation circuit that performs an interpolation process on an input digital signal and outputs interpolated data subjected to the interpolation process. A reading request signal making a request for outputting the interpolated data is input, and the interpolation circuit performs the interpolation process based on the digital signal input earlier than a timing at which the reading request signal is input.