Semiconductor Package Stack With Interposed IVR for Voltage Drop Control

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

The semiconductor industry faces challenges in achieving efficient power integrity and high performance computing requirements due to limitations in packaging techniques, particularly in the placement of integrated voltage regulators (IVRs) between redistribution structures and core substrates, which affect the distance and thermal impact on integrated circuit packages.

Innovation Solution

A package component design where an IVR is strategically placed between a redistribution structure and a core substrate, with conductive connectors and an underfill to ensure a shortest distance for efficient power delivery, mitigating voltage and power drops, and using encapsulants for structural support and environmental protection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the IVR is placed closer to the integrated circuit package to reduce distance, then power integrity and voltage stability improve, but thermal impact and heat accumulation worsen

Engineering Contradiction:

Improvepower integrityVSAvoidthermal impact

Core Design Contradiction:

ReliabilityVSTemperature

Solution Approach 1:

The patent transitions from planar placement to three-dimensional stacked configuration, placing the IVR vertically between the integrated circuit package and core substrate. This vertical arrangement minimizes the distance for power delivery while distributing thermal load through the substrate structure, resolving the contradiction between power integrity and thermal management.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces an underfill material as an intermediary between the IVR and surrounding structures. This underfill layer acts as a thermal interface material that facilitates heat dissipation from the IVR while maintaining electrical connections, thereby managing thermal impact without compromising power delivery efficiency.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Power

If the IVR is placed between the redistribution structure and core substrate, then power delivery efficiency improves, but manufacturing complexity increases

Engineering Contradiction:

Improvepower delivery efficiencyVSAvoidmanufacturing complexity

Core Design Contradiction:

PowerVSDevice complexity

Solution Approach 1:

The patent divides the semiconductor device into distinct functional layers: the integrated circuit package layer, the IVR layer, and the core substrate layer. This segmentation allows each component to be optimized independently and assembled through standardized processes, reducing overall manufacturing complexity despite the enhanced power delivery architecture.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The IVR is nested within the vertical stack between the integrated circuit package and core substrate, similar to a nested doll structure. This compact integration minimizes the footprint while maintaining efficient power delivery paths, and allows for modular manufacturing where layers can be prepared separately and combined.

Inventive Principle:

Principle #7Nested doll (Nesting)

3Reliability

If the distance between IVR and integrated circuit package is minimized, then voltage drops are reduced, but the risk of thermal damage increases

Engineering Contradiction:

Improvevoltage stabilityVSAvoidthermal damage risk

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies different material properties to different regions: the underfill material surrounding the IVR has optimized thermal conductivity for heat dissipation, while the direct connection path between IVR and integrated circuit package maintains high electrical conductivity for voltage stability. This local differentiation resolves the contradiction between voltage stability and thermal damage risk.

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances power integrity, increases operation frequency, and lowers supply voltage, enabling higher system-on-integrated-substrate (SoIS) yield while being fabricated with existing silicon tools, avoiding adverse thermal impacts and voltage drops.

Implementation Method 1

conductive connectors and an underfill to ensure a shortest distance for efficient power delivery

Methodology Applied

Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

using encapsulants for structural support and environmental protection

Methodology Applied

Scientific EffectEncapsulation: Physical Containment

Implementation Method 3

mitigating voltage and power drops, and using encapsulants for structural support and environmental protection

Methodology Applied

Scientific EffectThermal management: Thermal Insulation

Data Source

PatentUS11837567B2Semiconductor package and method of forming thereof

Publication Date: 2023.12.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor device includes a redistribution structure, an integrated circuit package attached to a first side of the redistribution structure and a core substrate coupled to a second side of the redistribution structure with a first conductive connector and a second conductive connector. The second side is opposite the first side. The semiconductor device further includes a top layer of the core substrate including a dielectric material and a chip disposed between the redistribution structure and the core substrate. The chip is interposed between sidewalls of the dielectric material.