Interposer Structure with 3D MIM Capacitors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing 2.5D assembly technologies using silicon interposers face challenges in mechanical strength due to deep trench capacitors, which also increase manufacturing costs when using insulative materials, and pose difficulties in accurately positioning metal contacts over 3D capacitor structures.
Innovation Solution
The interposer structure incorporates a wiring portion with 3D metal-insulator-metal (MIM) capacitors embedded within the middle-end-of-line (MEOL) structure, featuring a crown or concave-type capacitor configuration and capacitor electrodes to facilitate easier metal contact landing, while utilizing a substrate with a low-k dielectric material to minimize parasitic resistance and inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If deep trench capacitors are used in existing 2.5D assembly technologies, then capacitance is provided, but mechanical strength of the interposer structure deteriorates
Solution Approach 1:
The patent transitions from planar capacitors to three-dimensional stacked capacitor structures. Multiple capacitor plates are stacked vertically within the MEOL wiring portion, utilizing the vertical dimension to increase capacitance density without compromising the horizontal mechanical integrity of the interposer structure.
Solution Approach 2:
The capacitor structures are nested within the existing MEOL wiring portion structure. The capacitor plates and insulating layers are integrated into the multi-layer wiring architecture, embedding the capacitive elements within the structural framework rather than adding separate components that would weaken the structure.
2Quantity of substance
If 3D capacitor structures are implemented, then capacitance density increases, but manufacturing cost increases when using insulative materials
Solution Approach 1:
The MEOL wiring portion serves multiple functions: it provides interconnect pathways for signals and power, and simultaneously hosts the capacitor structures. The same dielectric and conductive layers used for wiring also form the capacitors, eliminating the need for separate insulative materials and reducing manufacturing complexity.
Solution Approach 2:
The capacitor manufacturing process is merged with the existing MEOL wiring formation process. Conductive layers, insulating layers, and capacitor electrodes are formed in an integrated sequence using the same fabrication tools and materials, avoiding additional processing steps and material costs.
3Quantity of substance
If 3D capacitor structures are used, then capacitance density improves, but positioning accuracy of metal contacts deteriorates
Solution Approach 1:
Capacitor electrode structures are formed to provide coplanar contacting surfaces at the same elevation level. This equipotential approach ensures that metal contacts can be accurately positioned without needing to navigate varying heights or complex three-dimensional geometries, maintaining alignment precision.
Solution Approach 2:
The capacitor electrode structures are formed in advance to create predetermined landing zones for metal contacts. These pre-formed electrodes establish accurate reference positions before subsequent contact formation steps, ensuring precise positioning despite the three-dimensional capacitor architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances capacitance density, reduces manufacturing costs, and improves the mechanical strength of the interposer structure, enabling more efficient space utilization and accurate metal contact placement, thus addressing the limitations of existing technologies.
Implementation Method 1
utilizing a substrate with a low-k dielectric material to minimize parasitic resistance and inductance
Data Source
AI summary
An interposer structure is provided. The interposer structure includes a plurality of interposer units in an array arrangement from a top view perspective. Each of the interposer units includes a first region and a plurality of second regions. The first region has a capacitor structure. Each of the plurality of second regions is free of the capacitor structure. The first region surrounds the plurality of second regions. A method for manufacturing an interposer structure is also provided.


