Interposer Board IR Drop Reduction for Chip Testing
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Solution Overview
Problem
The existing testing board designs fail to effectively stabilize the supply voltage for chips during testing due to IR drop issues, as the decoupling/bypassing capacitors are too far from the chip, leading to inadequate voltage stabilization.
Innovation Solution
The use of an interposer board with decoupling/bypassing capacitors positioned closer to the chip, coupled between the supply and ground voltages, to improve voltage stabilization, which can also include additional passive components like multiplexers or switches for enhanced test performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If decoupling/bypassing capacitors are provided on the testing board, then the IR drop issue is mitigated, but the distance between the capacitors and the chip is too far resulting in insufficient voltage stabilization
Solution Approach 1:
The testing system is divided into two separate boards: the testing board and the interposer board. The decoupling/bypassing capacitors are placed on the interposer board which is positioned closer to the chip, while the testing board handles signal testing functions. This segmentation allows the capacitors to be optimally positioned for voltage stabilization without compromising the testing board's signal integrity functions.
Solution Approach 2:
The interposer board acts as an intermediary between the testing board and the chip. It provides a platform that hosts the decoupling/bypassing capacitors in close proximity to the chip, thereby mediating the voltage stabilization function while allowing the testing board to maintain its signal testing role. This intermediary structure resolves the contradiction by enabling close capacitor placement without requiring the testing board itself to be modified.
2Adaptability or versatility
If the chip draws different currents during testing operations, then various power consumption levels occur, but this causes IR drop and worsens supply voltage stabilization
Solution Approach 1:
The decoupling/bypassing capacitors are pre-positioned on the interposer board in close proximity to the chip before testing begins. This preliminary placement ensures that the capacitors are already in optimal position to provide immediate voltage stabilization when the chip draws varying currents during different testing operations, preventing IR drop issues before they occur.
Solution Approach 2:
The decoupling/bypassing capacitors provide real-time feedback stabilization by automatically responding to voltage fluctuations caused by varying chip current draw. When the chip draws higher current causing voltage drop, the capacitors discharge to maintain stable voltage; when current draw decreases, the capacitors charge from the power supply. This automatic feedback mechanism handles adaptive power consumption without compromising voltage stabilization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The interposer board effectively stabilizes the supply voltage by reducing IR drop and improving test performance, with capacitors providing better voltage regulation due to their proximity to the chip, and allowing for simplified PCB design and cost savings.
Implementation Method 1
decoupling/bypassing capacitors are provided on the testing board to mitigate the IR drop issue
Implementation Method 2
the interposer board may have other passive components to improve the test performance
Data Source
AI summary
The present invention provides a device for testing a chip, wherein the device includes a testing board and an interposer. The testing board has a plurality of pads for providing a plurality of test signals. The interposer board includes a plurality of passive components, and at least one of the passive components is coupled between a supply voltage and a ground voltage, and the supply voltage and the ground voltage are received from a power pad and a ground pad of the plurality of pads of the testing board, respectively; wherein the chip is positioned in the device, the chip receives the test signals including the supply voltage and the ground voltage from the power pad and the ground pad of the testing board, respectively.


