Interposer Bond Pad Patterns for Multi-Chip Package Connectivity
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Solution Overview
Problem
Current integrated circuit packages face challenges in connecting multiple identical dice efficiently due to the need for unique interconnection patterns, which increases costs and package size, limiting the number of dice that can be connected without compromising latency or speed.
Innovation Solution
An integrated circuit package design featuring an interposer with a central die and identical satellite dice, connected via a substrate with a central pattern of bond pads and matching satellite bond pad patterns, allowing for efficient electrical connection without the need for unique dice designs, using a repeating geometric pattern to form conductive routes between the center die and satellite dice.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple identical integrated circuit dice are interconnected along the edges in conventional rectangular configurations, then the package size is reduced and manufacturing is simplified, but the number of dice that can be connected is limited to four or fewer due to unique interconnection pattern requirements
Solution Approach 1:
The interconnection network is segmented into multiple hierarchical levels: first-level interconnects connect each die to its immediate neighbors, while second-level interconnects provide long-range connections through the package. This segmentation allows identical dice to be connected in radix configurations beyond four by distributing interconnection complexity across multiple levels rather than requiring all connections at a single level.
Solution Approach 2:
The patent transitions from two-dimensional edge-based interconnection to three-dimensional volumetric interconnection by introducing vertical interconnect channels and multiple interconnection layers. This dimensional change enables radial configurations where dice can be connected in all directions from a central point, allowing more than four identical dice to be interconnected without requiring unique interconnection patterns for each die.
2Reliability
If unique integrated circuit dice are used to accommodate unique bump or interconnection patterns for more than four dice, then the interconnection R/C delay can be optimized, but the die design, validation, fabrication mask costs, and manufacturing costs become prohibitively expensive
Solution Approach 1:
The patent creates universal interconnection patterns that can be used with identical dice regardless of their position in the radix configuration. The same bump patterns and interconnection designs can be replicated across all dice, eliminating the need for unique die designs for each position. This universal approach maintains optimized R/C delay characteristics while dramatically reducing die design, validation, and fabrication costs.
Solution Approach 2:
The patent employs repeated copying of identical interconnection patterns and bump configurations across multiple dice. Rather than designing unique patterns for each die position, the same proven interconnection pattern is copied and replicated, ensuring consistent electrical performance while reducing design and manufacturing complexity and cost.
3Quantity of substance
If rectangular approximations of radix configurations are used to connect more than four identical dice, then the package can accommodate additional dice, but the integrated circuit package size becomes needlessly larger
Solution Approach 1:
The patent adopts radial or star-shaped interconnection topologies that more efficiently utilize the available package area compared to rectangular grid layouts. By organizing dice around central interconnection points with curved or radial interconnect paths, the design achieves better space utilization and reduces the overall package footprint for a given number of connected dice.
Data Source
AI summary
An integrated circuit package may be formed comprising an interposer with a center die and a plurality of identical integrated circuit dice positioned around the center die and attached to the interposer, wherein the center die is the switch/router for the plurality of identical integrated circuit dice. The interposer comprises a substrate, a central pattern of bond pads formed in or on the substrate for attaching the center die, and substantially identical satellite patterns formed in or on the substrate for attaching identical integrated circuit dice. The central pattern of bond pads has repeating sets of a specific geometric pattern and wherein the identical satellite patterns of bond pads are positioned to form the same geometric pattern as the specific geometric pattern of the central pattern of bond pads. Thus, substantially identical conductive routes may be formed between the center die and each of the identical integrated circuit dice.