Interposer Cache Die Partitioning for Smaller Semiconductor Packages

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Solution Overview

Problem

Semiconductor device structures face challenges in miniaturization due to the integration of logic circuits and cache memories within a single die, which increases die size and hinders further reduction.

Innovation Solution

The semiconductor device structure incorporates an interposer with separate semiconductor dies containing cache memories and memory control circuits, allowing logic circuits to be disposed in an electronic component, reducing the overall size and improving manufacturing yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If logic circuits and cache memories are integrated in a single die, then functionality is improved, but die size increases

Engineering Contradiction:

ImprovefunctionalityVSAvoiddie size

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent divides the semiconductor device into multiple separate dies: a first die containing the cache memory and a second die containing the logic circuits. This segmentation allows each die to be optimized independently for its specific function, maintaining full functionality while reducing the overall device size compared to a single integrated die.

Inventive Principle:

Principle #1Segmentation

2Adaptability or versatility

If logic circuits and cache memories are integrated in a single die, then functionality is improved, but manufacturing yield decreases

Engineering Contradiction:

ImprovefunctionalityVSAvoidmanufacturing yield

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

By segmenting the device into separate dies, the patent enables independent manufacturing and testing of each die. This improves manufacturing yield because defects in one die do not necessarily render the entire device non-functional, and defective dies can be identified and replaced independently.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces an interposer as an intermediary substrate that couples the first die (cache memory) and second die (logic circuits). This interposer facilitates electrical connections between the separate dies while allowing for modular assembly and replacement, thereby improving manufacturing yield and device reliability.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Area of stationary object

If logic circuits are placed in a separate electronic component, then size is reduced, but device complexity increases

Engineering Contradiction:

ImprovesizeVSAvoiddevice complexity

Core Design Contradiction:

Area of stationary objectVSDevice complexity

Solution Approach 1:

The interposer serves as a simplified intermediary that manages the complexity of connecting separate dies. It provides standardized electrical interfaces and routing, reducing the overall system complexity compared to attempting to integrate all functions into a single complex die.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS20260040585A1Semiconductor device structure with interposer and method of manufacturing the same

Publication Date: 2026.02.05 NAN YA TECH

AI summary

A semiconductor device structure and method of manufacturing the same are provided. The semiconductor device structure includes an interposer and a first electronic component. The interposer includes a first semiconductor die and a second semiconductor die. The first semiconductor die includes a first cache memory and a first memory control circuit. The second semiconductor die includes a second cache memory and a second memory control circuit. The first electronic component is disposed on the interposer and in communication with the first semiconductor die and the second semiconductor die.