Interposer Package Cavity Stiffener for Crack-Resistant Substrates
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Solution Overview
Problem
The miniaturization of semiconductor chips poses challenges in bonding bumps, handling, and testing, and the introduction of cavities in interposer substrates can lead to cracks, complicating the fabrication of interposer package-on-packages.
Innovation Solution
A package design that includes a lower substrate with posts and a lower chip, an upper substrate with a cavity and a crack stiffener at its edge, which is configured to reduce crack formation, and a method of fabricating this package involving the formation of posts, mounting chips, creating cavities, and applying crack stiffeners to prevent damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If a cavity is formed in the interposer substrate to meet various requests or standards, then the interposer substrate can be made thinner or accommodate specific design requirements, but the cavity may induce cracks in the interposer substrate
Solution Approach 1:
A crack stiffener is formed at the edge of the cavity in the interposer substrate before final assembly. This crack stiffener acts as a preventive measure to reinforce the cavity edge and prevent crack propagation, thereby maintaining reliability while allowing the substrate to be thinner with the cavity structure
Solution Approach 2:
The interposer substrate is constructed as a composite structure combining the substrate material with a crack stiffener material having different mechanical properties. The crack stiffener provides enhanced strength and crack resistance at the critical cavity edge region, allowing the overall substrate to be thinner while maintaining structural integrity
2Area of moving object
If the size of the semiconductor chip is reduced for high integration, then more chips can be mounted on the same area, but it becomes difficult to handle and test the semiconductor chip
Solution Approach 1:
An interposer substrate is introduced as an intermediary component between the small semiconductor chips and the mount board. The interposer provides a larger interface area with bump structures that facilitate easier handling, bonding, and testing, while allowing the actual chips to be small for high integration
Solution Approach 2:
The package structure is segmented into distinct functional components: the small semiconductor chips mounted on the interposer substrate, which itself is mounted on the mount board. This segmentation allows each component to be optimized independently - chips for miniaturization, interposer for handling and testing
Data Source
AI summary
A package includes a lower substrate, a lower chip provided on the lower substrate, posts provided on an edge of the lower substrate and outside of the lower chip, an upper substrate provided on the posts and the lower chip, the upper substrate including a cavity formed on a bottom surface of the upper substrate, and a crack stiffener provided at an edge of the cavity, where the crack stiffener is configured to reduce formation of a crack in the upper substrate.


