Semiconductor Package Structure With Vertical Die Heat Path

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Solution Overview

Problem

Existing semiconductor package structures face inefficiencies in thermal dissipation, leading to potential damage from increased temperatures and affecting performance.

Innovation Solution

The semiconductor package structure includes a substrate, semiconductor die, interposer, heat spreader, and adhesive layer, with the heat spreader embedded in the interposer to vertically overlap the semiconductor die, and a conductive structure partially disposed in the interposer to electrically couple the substrate, enhancing thermal conductivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If heat dissipation path is lengthened in conventional package structures, then thermal management becomes more difficult, but structural simplicity is maintained

Engineering Contradiction:
Improvethermal dissipation efficiencyVSAvoidpackage structure complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The heat spreader is embedded within the interposer structure, with the adhesive layer positioned in the cavity of the interposer. This nesting arrangement allows the heat dissipation components to be integrated within the existing package layers, shortening the thermal path without adding external complexity to the overall package structure.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The heat spreader is positioned to vertically overlap the semiconductor die, creating a direct vertical thermal conduction path through the adhesive layer. This vertical arrangement in the Z-dimension provides a shorter heat dissipation path compared to conventional lateral heat transfer routes, improving thermal efficiency without increasing planar footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Strength

If adhesive layer thickness is increased to improve bonding, then mechanical strength improves, but thermal conduction efficiency decreases

Engineering Contradiction:
Improvebonding strengthVSAvoidthermal conduction efficiency
Core Design Contradiction:
StrengthVSTemperature

Solution Approach 1:

The adhesive layer is positioned within the cavity of the interposer, allowing precise control of its thickness. This parameter optimization enables the adhesive layer to provide sufficient bonding strength while maintaining minimal thickness to preserve thermal conduction efficiency, resolving the trade-off between mechanical strength and thermal performance.

Inventive Principle:
Principle #35Parameter changes

3Stability of the object's composition

If interposer thickness is increased to provide structural support, then warpage resistance improves, but manufacturing complexity increases

Engineering Contradiction:
Improvewarpage resistanceVSAvoidmanufacturing complexity
Core Design Contradiction:
Stability of the object's compositionVSEase of manufacture

Solution Approach 1:

The interposer features a cavity structure that is localized to specific regions, providing enhanced structural support and warpage resistance only where needed. This localized approach maintains overall manufacturing simplicity while achieving the required structural stability in critical areas.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves thermal dissipation efficiency, reduces warpage, and enhances the overall performance of the semiconductor package by shortening the heat dissipation path and providing stronger support.

Implementation Method 1

The adhesive layer is disposed in the cavity and connects the semiconductor die to the heat spreader

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

The heat spreader is embedded in the interposer and vertically overlaps the semiconductor die

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20250233040A1Semiconductor package structure
Publication Date: 2025.07.17 MEDIATEK INC
  • US20250233040A1 patent drawing
  • US20250233040A1 patent drawing
  • US20250233040A1 patent drawing

AI summary

A semiconductor package structure includes a substrate, a semiconductor die, an interposer, a heat spreader, and an adhesive layer. The semiconductor die is disposed over the substrate. The interposer is disposed over the semiconductor die and has a cavity. The heat spreader is embedded in the interposer and vertically overlaps the semiconductor die. The adhesive layer is disposed in the cavity and connects the semiconductor die to the heat spreader.