Interposer Cavity Packaging to Prevent IC-Substrate Contact
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Solution Overview
Problem
High-performance computing (HPC) semiconductor packages experience stress and strain, leading to bending and deformation, which can cause the integrated circuit (IC) device to contact the substrate, resulting in damage and reduced reliability.
Innovation Solution
The semiconductor package includes an interposer with a cavity that houses the IC device, creating a clearance between the IC device and the substrate, thereby reducing the likelihood of contact during bending or deformation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the IC device is attached directly to the interposer without a cavity, then the device complexity is reduced and manufacturing is easier, but the IC device contacts the substrate during bending or deformation, causing damage and reducing reliability
Solution Approach 1:
The IC device is nested within a cavity formed in the interposer, creating a protective enclosure that prevents direct contact between the IC device and substrate during bending or deformation. This nesting structure resolves the contradiction by providing reliability through physical protection while maintaining relatively simple manufacturing processes.
Solution Approach 2:
The cavity introduces a vertical dimension (depth) to the interposer structure, creating clearance space between the IC device and substrate. This dimensional change allows the IC device to be positioned above the substrate surface, preventing contact during thermal stress-induced bending while maintaining a compact overall package design.
2Volume of moving object
If the IC device is positioned close to the substrate, then the package size is reduced, but thermal stress causes bending that leads to IC device contact and damage
Solution Approach 1:
The IC device is nested within a cavity formed in the interposer, creating a protective enclosure that prevents direct contact between the IC device and substrate during bending or deformation. This nesting structure resolves the contradiction by providing reliability through physical protection while maintaining relatively simple manufacturing processes.
Solution Approach 2:
The cavity acts as a pre-established protective space that cushions the IC device from contact with the substrate during thermal stress-induced bending. This beforehand cushioning approach resolves the contradiction by providing a safety margin that prevents damage while maintaining compact packaging.
3Reliability
If the interposer is made thicker to accommodate a cavity, then the IC device is protected from substrate contact, but the overall package height increases
Solution Approach 1:
The cavity introduces a vertical dimension (depth) to the interposer structure, creating clearance space between the IC device and substrate. This dimensional change allows the IC device to be positioned above the substrate surface, preventing contact during thermal stress-induced bending while maintaining a compact overall package design.
Solution Approach 2:
The cavity is formed locally in the interposer at the specific location where the IC device is mounted, rather than uniformly thickening the entire interposer. This localized approach provides the necessary protection and clearance only where needed, minimizing the overall increase in package height while maintaining reliability.
Data Source
AI summary
A semiconductor package, which may correspond to a high-performance computing package, includes an interposer, a substrate, and an integrated circuit device between the interposer and the substrate. The integrated circuit device, which may correspond to an integrated passive device, is attached to the interposer within a cavity of the interposer. Attaching the integrated circuit device within the cavity of the interposer creates a clearance between the integrated circuit device and the substrate. In this way, a likelihood of the integrated circuit device contacting the substrate during a bending and/or a deformation of the semiconductor package is reduced. By reducing the likelihood of such contact, damage to the integrated circuit device and/or the substrate may be avoided to increase a reliability and/or yield of the semiconductor package.