Interposer With Central Cavity For IC Package Stacking

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Solution Overview

Problem

Current integrated circuit packaging techniques face challenges such as increased manufacturing costs and decreased product yield due to the need for extra assembly steps in vertically stacked MCMs, as well as limitations in chip density and solder ball diameter in package-on-package configurations, which restrict the use of epoxy mold compounds and lead to local planarization inconsistencies.

Innovation Solution

The use of an interposer of predetermined thickness with a central cavity and contacts formed around it to connect first and second packages, allowing for various chip thickness and stacking configurations, reducing solder ball diameter, and increasing the selection of epoxy mold compounds by eliminating restrictions on mold portion thickness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If vertically stacked MCM configuration is used to increase chip density, then chip density is improved, but manufacturing complexity and cost increase due to required pre-assembly testing

Engineering Contradiction:
Improvechip densityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The invention divides the packaging process into independent segments: chips are packaged individually on separate substrates first, then multiple packaged chips are stacked and connected using an interposer. This segmentation allows each chip to be tested and packaged independently before final assembly, eliminating the need for complex pre-assembly testing of the entire stacked structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The interposer serves as an intermediary component between the bottom and top packaged chips. It provides the connection interface and allows the two packaged chips to be connected without requiring complex direct integration, simplifying the manufacturing process while maintaining high chip density.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If bottom chip is made larger to accommodate bond pads in vertically stacked MCM, then connection reliability is improved, but wafer space utilization decreases

Engineering Contradiction:
Improveconnection reliabilityVSAvoidwafer space
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The invention transitions from horizontal bonding pad arrangement to vertical stacking with an interposer. The connection interface is moved to a different dimensional space (the interposer layer between chips), allowing smaller chip footprints while maintaining adequate bonding pad area through the interposer's larger surface area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The interposer acts as a mediator that provides the bonding pad array, eliminating the need for the bottom chip to be oversized. The interposer's larger surface area accommodates the bonding pads, while the chips themselves can be smaller and more efficiently utilized on the wafer.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If mold cap thickness is reduced in package on package structure, then solder ball contact is improved, but epoxy mold compound selection is restricted

Engineering Contradiction:
Improvesolder ball contact precisionVSAvoidepoxy mold compound selection
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The interposer serves as an intermediary that decouples the mold cap thickness requirement from the solder ball contact requirement. By providing a separate connection interface on the interposer, the mold cap can be thicker (allowing broader epoxy selection) while still achieving precise solder ball contact through the interposer's connection structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8089143B2Integrated circuit package system using interposer
Publication Date: 2012.01.03 STATS CHIPPAC MANAGEMENT PTE LTD
  • US8089143B2 patent drawing
  • US8089143B2 patent drawing
  • US8089143B2 patent drawing

AI summary

An integrated circuit package system is provided in which an interposer of predetermined thickness including a central cavity is formed. Additionally, one or more contacts are formed around the central cavity on the interposer. The interposer is employed for connecting first and second packages.