Interposer Chip-Component Structure with In-Hole Electrodes
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Solution Overview
Problem
Multilayer capacitors mounted on circuit boards with an interposer experience increased equivalent series inductance (ESL) due to extended current paths, leading to acoustic noise when the joining material spreads onto the capacitor's outer electrodes, causing mechanical distortions and noise transmission.
Innovation Solution
A chip-component structure featuring a multilayer capacitor on an interposer with in-hole electrodes connecting the component and external connection electrodes through a through-hole, reducing the amount of solder that reaches the outer electrodes and dispersing current paths by adding side electrodes, thereby minimizing ESL and acoustic noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the width of side electrodes is increased to reduce ESL, then the cross-sectional area of wiring is increased, but the amount of joining material that wets and spreads upward on the side electrodes increases, causing distortion transmission and acoustic noise
Solution Approach 1:
The patent introduces a groove structure as an intermediary element between the side electrode and the outer electrode of the capacitor. This groove acts as a physical barrier that mediates the interaction between the joining material and the capacitor, preventing the joining material from directly contacting and wetting the outer electrode surface, thus blocking the transmission path for mechanical distortion while maintaining adequate wiring width for low ESL
Solution Approach 2:
The side electrode structure is segmented by introducing a groove that divides the side electrode into upper and lower portions. This segmentation creates a discontinuity in the surface that prevents continuous wetting of the joining material, effectively blocking the distortion transmission path while maintaining electrical connectivity and low inductance
2Object-generated harmful factors
If an interposer is used to mount the multilayer capacitor on the circuit board, then acoustic noise is reduced by preventing distortion transmission, but the current path is extended by wiring in the interposer, increasing ESL
Solution Approach 1:
The patent transitions from a planar two-dimensional electrode layout to a three-dimensional structure by introducing grooves that create vertical depth variations. This dimensional change allows the side electrodes to maintain adequate width for low ESL while the groove depth provides the necessary barrier to prevent joining material wetting, effectively decoupling the electrical performance from the mechanical isolation function
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The structure significantly reduces ESL and prevents acoustic noise by canceling magnetic fields and dispersing current paths, while also facilitating easier cleaning of flux residues between the circuit board and interposer.
Implementation Method 1
the in-hole electrodes connected to the different outer electrodes of the multilayer capacitor are provided in the same through-hole... currents in the in-hole electrodes flow in opposite directions, and the magnetic fields cancel each other out
Implementation Method 2
the amount of joining material that wets and spreads upward on the side electrodes increases
Data Source
AI summary
A chip-component structure includes an interposer on which a multilayer capacitor is mounted. The interposer includes component connecting electrodes, external connection electrodes, side electrodes, and in-hole electrodes. The component connecting electrodes and the external connection electrodes are electrically connected by the side electrodes and the in-hole electrodes. Outer electrodes of the capacitor are joined to the component connecting electrodes.