Interposer Chip Package Structure for High-Speed, Low-Heat Stacking
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Solution Overview
Problem
New packaging technologies for semiconductor dies face manufacturing challenges as they strive to improve density and functionality while maintaining reliability and performance.
Innovation Solution
A package structure is formed with a chip-containing structure bonded to a redistribution structure and an interposer chip, which includes active devices for improved electrical communication, reducing operation heat and enhancing performance and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If new packaging technologies are used to improve density and functionality, then the number of interconnected devices per chip area increases, but manufacturing challenges arise
Solution Approach 1:
The packaging structure is divided into multiple separate components including a carrier substrate, an interposer chip, and a device chip. These segmented components are manufactured independently using optimized processes for each, then assembled together. This allows each component to be manufactured with appropriate process conditions without compromising the others, resolving the manufacturing challenges while maintaining high density and functionality.
2Volume of moving object
If smaller package structures are developed to take up less space, then package height and area are reduced, but manufacturing complexity increases
Solution Approach 1:
The patent transitions from planar packaging to three-dimensional stacking by introducing vertical interconnections through the interposer chip. Multiple device layers are stacked vertically with interposers providing electrical interconnection between layers, achieving high functionality and connectivity in a compact volume by utilizing the vertical dimension rather than expanding horizontal area.
3Speed
If active devices are added to the interposer chip for improved electrical communication, then operational speed increases and heat is generated
Solution Approach 1:
The interposer chip acts as an intermediary component between the carrier substrate and the device chip. It provides electrical interconnection and signal routing functionality, enabling high-speed communication between stacked device layers. The interposer manages heat generation from active devices by distributing thermal load and providing thermal pathways to dissipate heat, thus maintaining operational speed while controlling temperature.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The package structure achieves high operational speed and low operation temperature by utilizing active devices in the interposer chip, improving electrical signal operation and heat dissipation.
Implementation Method 1
bonded to the redistribution structure through multiple solder bumps
Data Source
AI summary
A package structure and a method for forming a package structure are provided. The package structure includes a chip-containing structure bonded to a redistribution structure through multiple first solder bumps. The package structure also includes a memory-containing structure bonded to an interposer chip. The interposer chip is bonded to the redistribution structure through multiple second solder bumps. The package structure further includes a substrate, and the redistribution structure is over the substrate.