Interposer Control Unit for Stacked Semiconductor Package Testing
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Solution Overview
Problem
In stacked semiconductor packages, the interposer causes increased loading and delay during input/output pad testing, leading to deteriorated test results due to its loading effects.
Innovation Solution
Incorporating a control unit within the interposer that stores data to be written and outputs it based on a test mode signal, using a latch section, selection section, signal generation section, and buffer sections to manage data transfer efficiently, thereby minimizing loading and delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the interposer is used to electrically connect the package substrate to the semiconductor chips, then the electrical connection is achieved, but the loading and delay increase during input/output pad testing
Solution Approach 1:
The interposer pre-charges the pad capacitance during a pre-charge phase before the actual write operation. This preliminary action reduces the effective capacitance that must be charged during the write operation, thereby reducing the delay and allowing faster write speeds without compromising the electrical connection reliability.
2Reliability
If the interposer is used to electrically connect the package substrate to the semiconductor chips, then the electrical connection is achieved, but the loading increases during input/output pad testing
Solution Approach 1:
The interposer performs a pre-charge operation before the actual data write, preliminarily charging the pad capacitance. This reduces the effective capacitive loading during the write operation, allowing faster write speeds without compromising the electrical connection.
Solution Approach 2:
The interposer dynamically switches between different operational modes (pre-charge mode and write mode) based on the test mode signal. This dynamic operation allows the system to optimize performance by reducing effective capacitance during critical write operations while maintaining reliable electrical connections.
3Ease of operation
If data is written directly to the semiconductor chips during testing, then the test operation is simple, but the test accuracy deteriorates due to loading effects
Solution Approach 1:
The interposer acts as an intermediary between the package substrate and the semiconductor chips during testing. It includes a control unit that manages data transfer and a pad capacitance pre-charging unit that reduces loading effects. This intermediary structure maintains ease of operation while improving test accuracy by minimizing distortion caused by capacitive loading.
Data Source
AI summary
A stacked semiconductor package includes a package substrate, an interposer mounted on the package substrate, a plurality of semiconductor chips stacked on the interposer, and a control unit provided in the interposer, that stores in advance data to be written in the plurality of semiconductor chips, and that outputs the data stored in advance according a test mode signal.