Interposer Chip Layout for Diagonal Inter-Chip Data Transfer
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Solution Overview
Problem
Existing semiconductor devices face challenges in providing effective inter-chip communication, particularly when chips are placed on diagonal lines, making it difficult to route wires between them.
Innovation Solution
The semiconductor device comprises four chips mounted on a substrate, with specific transferring circuits in each chip to facilitate data transfer between chips placed on diagonal lines, allowing for efficient communication without the need for complex wire routing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If chips are placed on diagonal lines of the substrate, then the substrate area utilization is improved, but wire routing between chips becomes difficult
Solution Approach 1:
The patent introduces an intermediary chip (the second chip) that acts as a mediator to transfer data between chips positioned on diagonal lines. Instead of directly routing wires between diagonally positioned chips, the data is transferred through the intermediary chip located on the same horizontal or vertical line, thereby avoiding the wire routing difficulty while maintaining diagonal placement benefits.
Solution Approach 2:
The patent segments the direct data transfer path between diagonal chips into multiple shorter segments. Data transfer from a source chip to a destination chip on a diagonal is divided into two segments: first from the source chip to an intermediary chip on the same row/column, then from the intermediary chip to the destination chip. This segmentation avoids the need for complex diagonal wire routing.
2Adaptability or versatility
If transferring circuits are added to enable diagonal chip communication, then inter-chip communication capability is improved, but device complexity increases
Solution Approach 1:
The transferring circuits implemented in each chip are designed to be universal and multi-functional. Each chip's transferring circuit can communicate with any other chip on the same horizontal or vertical line, and can also serve as an intermediary for diagonal communications. This universal design avoids the need for specialized dedicated circuits for each chip pair, thereby reducing overall device complexity while maintaining full communication capability.
Solution Approach 2:
Each chip is equipped with self-contained transferring circuits that enable it to autonomously perform data transfer operations. The chips self-manage their own communication needs and can also assist other chips as intermediaries, eliminating the need for complex external control circuitry or centralized routing management, thus reducing overall system complexity.
3Ease of manufacture
If common layout design is used for multiple chips, then manufacturing cost is reduced, but chip functionality must be standardized
Solution Approach 1:
The patent employs a universal chip layout design where each chip is structured with identical transferring circuits and communication interfaces. This universal layout enables common manufacturing processes and reduces costs. Despite the standardized physical layout, the chips maintain functional versatility through software or configuration-based differentiation, allowing them to perform different roles (source, destination, intermediary) in various communication scenarios.
Data Source
AI summary
A semiconductor device includes a first chip; and a second chip placed adjacent to the first chip. The first chip transfers data to the second chip via a silicon interposer. The data transferred to the second chip from the first chip via the silicon interposer is used in an arithmetic operation by an internal circuit of the second chip. A layout design of the first chip is the same as a layout design of the second chip.