Interposer Dummy Pads for Uniform Heat Bonding
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Solution Overview
Problem
Current semiconductor packages face challenges in achieving high-performance, high-speed, and compact designs while maintaining reliable electrical connections and preventing bonding failures between the interposer substrate and the package substrate.
Innovation Solution
The semiconductor package design includes a package substrate with interposer terminals, signal pads, and dummy pads on the interposer substrate, which are all at the same vertical height, allowing for efficient signal transfer between chips and stable bonding through a heat bonding process that utilizes both signal and dummy pads to ensure uniform heat and pressure distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If heat bonding is performed only on signal pads, then electrical connections are established, but heat and pressure distribution becomes non-uniform causing bonding failures
Solution Approach 1:
Dummy pads are created as copies of signal pads but without electrical connection functions. These dummy pads replicate the physical structure and heat conduction properties of signal pads, allowing them to serve as additional heat dissipation paths during bonding without adding electrical complexity
Solution Approach 2:
The dummy pads serve multiple functions: they act as heat sinks during the bonding process to improve heat distribution, provide mechanical support for uniform pressure application, and maintain structural symmetry on the interposer substrate without performing electrical signal transmission
2Productivity
If the interposer substrate size is increased to accommodate more signal pads, then electrical connection capability improves, but package area increases
Solution Approach 1:
Dummy pads are strategically placed in specific regions of the interposer substrate where they are needed for heat distribution and mechanical support, rather than uniformly distributing all pads across the substrate. This localized approach optimizes bonding reliability without maximizing overall substrate area
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances electrical characteristics and prevents bonding failures by ensuring effective heat and pressure transfer across the entire interposer substrate, leading to improved reliability and performance in semiconductor packages.
Implementation Method 1
a heat bonding process to bond the interposer substrate to the package substrate through the interposer terminals. The heat bonding process includes applying heat and pressure to the interposer substrate by pressing a heat-bonding head on the first surface of the interposer substrate and heating the first plurality of signal pads and the plurality of dummy pads
Data Source
AI summary
A semiconductor package includes a package substrate, a plurality of package terminals disposed on the bottom surface of the package substrate, and an interposer substrate disposed on the top surface of the package substrate, a plurality of interposer terminals disposed on the bottom surface of the interposer substrate and electrically connected to the package substrate, a first semiconductor chip disposed on the top surface of the interposer substrate, a second semiconductor chip disposed on the top surface of the interposer substrate and disposed to be horizontally separated from the first semiconductor chip, a first plurality of signal pads disposed on the top surface of the interposer substrate and electrically connected to wiring in the interposer substrate and one or more circuits in the first semiconductor chip, a second plurality of signal pads disposed on the top surface of the interposer substrate and electrically connected to wiring in the interposer substrate and to one or more circuits in the second semiconductor chip, and a plurality of dummy pads disposed outside of an area occupied by the first semiconductor chip or the second semiconductor chip from a top-down view and disposed on the top surface of the interposer substrate. Each pad of the first plurality of signal pads and the second plurality of signal pads is configured to transfer signals between the interposer substrate and a respective semiconductor chip, and each pad of the dummy pads is not configured to transfer signals between the interposer substrate and any semiconductor chip disposed thereon.